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dw-dma: enable HW LLI on BYT and CHT - #365

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@xiulipan

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Enabel HW LLI for BYT and CHT requested from #342

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>

@lgirdwood lgirdwood left a comment

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Please provide a commit message and does this work for STOP ?

@xiulipan

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@lgirdwood
Enabled HW_LLI on BYT, but the dma could not be stopped, either.

@@ -491,6 +488,9 @@ static int dw_dma_stop(struct dma *dma, int channel)
        dw_write(dma, DW_DMA_CHAN_EN, CHAN_DISABLE(channel));

 #if DW_USE_HW_LLI
+       trace_dma_error("Dli");
+       trace_error_value(dw_read(dma, DW_DMA_CHAN_EN));
+       trace_error_value(channel);
        lli = p->chan[channel].lli;
        for (i = 0; i < p->chan[channel].desc_count; i++) {
                lli->ctrl_hi &= ~DW_CTLH_DONE(1);

0x10 [211.938786] delta [211.935215] dma Dli
0x20 [211.938789] delta [0.000003] value 0x0000000000000000
0x30 [211.938791] delta [0.000002] value 0x0000000000000002 // capture works fine
0x40 [1130.561518] delta [918.622727] dma Dli
0x50 [1130.561520] delta [0.000003] value 0x0000000000000002
0x60 [1130.561523] delta [0.000002] value 0x0000000000000001 //playback could not stop

@xiulipan

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@lgirdwood
No idea why only the playback DMA did not stop.
Need to check about the DMAC and channel info.

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@xiulipan the DMA LLI needs next LLI + 1 set to NULL before it's reloaded to stop the DMAC in HW LLI mode. Can you confirm you are doing this ?

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@lgirdwood
This will change the whole logic of dma, now we just stop the dma.
If we change the lli list, then we will have a period delay. This is what @tlauda have patch to avoid.

The same code works find on APL and CNL, but on BYT it seems have different behavior.

@xiulipan xiulipan closed this Sep 18, 2018
@xiulipan
xiulipan deleted the hwlli branch September 19, 2019 09:32
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2 participants