[RanderWang]

It is caused by the change of removing dai waiting after stop.
dma should not be stopped in dai_comp_trigger if HW LLI is not
enable. At this time DMA is still working and it can't be stopped
DMA engine would stop the channel automatically after each transfer.

Signed-off-by: Pan Xiuli xiuli.pan@linux.intel.com
Signed-off-by: Rander Wang rander.wang@linux.intel.com

[lgirdwood]

Probably best just to remove SW LLI then ?

[RanderWang]

to enable HW LLI on BYT?

[lgirdwood]

yes

[xiulipan]

@lgirdwood
Enabled HW_LLI on BYT, but the dma could not be stopped, either.

@@ -491,6 +488,9 @@ static int dw_dma_stop(struct dma *dma, int channel)
        dw_write(dma, DW_DMA_CHAN_EN, CHAN_DISABLE(channel));

 #if DW_USE_HW_LLI
+       trace_dma_error("Dli");
+       trace_error_value(dw_read(dma, DW_DMA_CHAN_EN));
+       trace_error_value(channel);
        lli = p->chan[channel].lli;
        for (i = 0; i < p->chan[channel].desc_count; i++) {
                lli->ctrl_hi &= ~DW_CTLH_DONE(1);

0x10 [211.938786] delta [211.935215] dma Dli
0x20 [211.938789] delta [0.000003] value 0x0000000000000000
0x30 [211.938791] delta [0.000002] value 0x0000000000000002 // capture works fine
0x40 [1130.561518] delta [918.622727] dma Dli
0x50 [1130.561520] delta [0.000003] value 0x0000000000000002
0x60 [1130.561523] delta [0.000002] value 0x0000000000000001 //playback could not stop

[RanderWang]

@tlauda Do you have any idea?

[lgirdwood]

@RanderWang I think on BYT you will need to write NULL to the next + 1 descriptor ptr. This way DMA will load it and see a STOP condition.

[RanderWang]

@lgirdwood @xiulipan Actually xiuli implemented the HW LLI.
Hi xiuli, do want me to help you ?

[xiulipan]

@lgirdwood
HW LLI for BYT is #365

[RanderWang]

@RanderWang I think on BYT you will need to write NULL to the next + 1 descriptor ptr. This way DMA will load it and see a STOP condition.

@lgirdwood I have tried this method, still failed. SSP is stopped after DMA stop. So I think DMA pointer does't move without ack from SSP. And I will go on debugging it.

[lgirdwood]

@RanderWang DMA must be stopped before (with DMA FIFO empty and channel in idle) before we stop SSP or other DAIs.

[RanderWang]

@RanderWang DMA must be stopped before (with DMA FIFO empty and channel in idle) before we stop SSP or other DAIs.

Yes, it is just what I described in this patch. HW LLI can't resolve this issue and I found some regression issues with HW LLI enabled on BYT. My idea is that: the behavior of DMA on BYT is different with APL & CNL, so can we make a special stop function for BYT ? I will update my patch
and any suggestion is welcome

[RanderWang]

@lgirdwood Do you want to enable HW LLI on BYT now? my patch would base on your choice.

[lgirdwood]

@RanderWang @xiulipan yes, make special stop path for BYT with conditional compile. It should only touch dw-dma.c and create a new stop function(s).

[RanderWang]

update my patch , thanks for review

[lgirdwood]

@RanderWang can you split into 2 patches, one for wait and one for DMA and rebase (for conflicts).

[RanderWang]

update my patch, thanks for review

[lgirdwood]

@RanderWang checkpatch errors.

[RanderWang]

It is line over 80 characters. Do you need me to fix this ?

[RanderWang]

Ok, update my patch. sometimes, I don't like the limitation of 80 characters