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Bug pause - #2364
Bug pause#2364
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SOFCI TEST |
plbossart
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This looks like serious/well-structured work, but it would be useful if there was a cover letter or something that indicates what you are trying to fix. What is the issue with pause really? Is this a problem exposed by low-level tests, or something that can happen in a driver/linux environment.
Also I am not clear on how well the PAUSE is supported. To the best of my knowledge we didn't enable a number of hardware capabilities, e.g. to restore DMA context after resume.
Thanks!
@plbossart me too but from firmware side STOP and PAUSE are separate commands. I've checked my solution with low-level tests only.
As I see there is introduced one issue, I'm going to fix it. |
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@xiulipan @tlauda @slawblauciak seeing this on several PRs now on APL Do we have a issue # for this on bug scrub ? |
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@lgirdwood We also find IPC timeout issue on APL/TGL now. @ranj063 @fredoh9 @ClarexZhou thesofproject/linux#1783 #2348 |
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@lgirdwood @zrombel I think we need more testing regarding IPC timeout. In this PR #2367 it failed on two separate APL platforms and both times on DAI config for SSP5. It looks very suspicious. Also DMIC DAI config timeout disappeared with some random changes in the FW, so I suspect some kind of memory issue. |
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@lgirdwood I don't think we do |
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@lgirdwood From suggestion of @wenqingfu, we will keep the BDW status to track when the BDW will recovery. For SOF PR that need to check BDW status, we can do some manually check. Is that OK for you? |
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@lgirdwood after rerun (without code change), TestKdSsp16000Hz16b16b2ch failed and TestPtpComplexStreamOperations24000Hz24b32b4ch pass, so I guess it's some CI issue. |
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Running CI again for BDW test. Internal CI will need bisected. |
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juimonen
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check the commit message, there's quite a lot of typos etc.
- continuous -> continuity?
- "Such a solution is less error prone.", remove this sentence altogether
- in paused state and after channel stop state should be preprare, to be
conistent with sof-docs -> typos and grammar
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@plbossart @keyonjie I'm assuming the PM failures on BDW are known/WIP and wont block this merging ? |
I remember @ranj063 was working on BYT/CHT/BDW PM implementation but looks not integrated yet? But I am not sure if we will hit error or the driver will just not do power cycle and everything looks fine when system suspending triggered on BDW? @plbossart @ranj063 do you know the latest status about this? |
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SOFCI TEST |
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Let me retry, I did see this pass yesterday so it could be the DUT or a recent kernel update. |
When there is not enough time to wait for FIFO empty and we care about data continuity - like in pause state - then SSP should be kept connected with DMA in pause state. Stop function has been updated to take action also on channels in COMP_STATE_PAUSED state. After receiving COMP_TRIGGER_STOP, component state should be set to COMP_STATE_PREPARE, what is consistent with sof-docs. Introduced changes have positive impact on glitches after pause/resume sequence. Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
#2203
dw_dma: Remove redundant write pointer increment
Function dw_dma_increment_pointer is called in each
dw_dma_copy and moves write pointer by number of passed
bytes a priori. Its why this function shouldn't be called
after dma stops before whole transmission ends.
It leads to misalignment in data stored in any queue between
source buffer and output, with data written to this interface
and glitch when first data after release command come.
dw_dma: Shorten DW_DMA_TIMEOUT value below 1 ms
Timeout values above 1ms (task period) shouldn't happen.
In such a situation system agent is likely to panic
because of time drift, what shouldn't happen in such
a situation.
dw_dma: Suspend DMA channel in stop function
Suspend flag should be set regardless of draining mode to stop
draining data from source buffer.
ssp: Keep SSP connected with DMA in pause state
When there is not enough time to wait for FIFO empty and we care about
data continuous - like in pause state - then SSP should be kept connected
with DMA in pause state. Such a solution is less error prone.
After this change, glitches after pause/resume sequence disappear.