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The-OpenROAD-Project / OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

magic asic rtl verilog vlsi foundry yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds

Updated Mar 25, 2026
Python

limbo018 / DREAMPlace

Star

Deep learning toolkit-enabled VLSI placement

deep-learning pytorch gpu-acceleration vlsi vlsi-physical-design vlsi-placement

Updated Jul 18, 2026
C++

OpenTimer / OpenTimer

Star

A High-performance Timing Analysis Tool for VLSI Systems

parallel-computing eda circuit-simulator cad verilog cpp17 circuit-simulation vlsi circuit-analysis computer-aided-design vlsi-physical-design sta electronic-design-automation vlsi-circuits static-timing-analysis

Updated Dec 26, 2025
Verilog

VLSI-EDA / PoC

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The PoC Library has been forked to github.com/VHDL/PoC. See new address below

Updated Jul 30, 2025
VHDL

chipfoundry / openlane2

Sponsor

Star

The next generation of OpenLane, rewritten from scratch with a modular architecture

flow asic eda verilog vlsi pnr silicon lvs flows sta gdsii drc pdk openroad openlane sky130 gf180mcu rtl-to-gds

Updated Dec 2, 2025
Python

arm-education / VLSI-Fundamentals-Education-Kit

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Education kit for teaching VLSI fundamentals through practical microprocessor design using industry EDA tools (educational)

arm verification computer-engineering hardware-designs vlsi teaching-materials electrical-engineering cadence-virtuoso cmos physical-design microprocessor-implementation synopsys-design devices-circuits-materials eda-tools education-kit

Updated May 30, 2025
HTML

DegateCommunity / Degate

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A modern and open-source cross-platform software for chips reverse engineering.

security multi-platform gui cross-platform cpp vhdl reverse-engineering cybersecurity verilog chips vlsi security-tools

Updated Nov 25, 2024
C++

eelab-dev / EEcircuit

Star

A browser-based SPICE circuit simulator

simulation electronics webassembly wasm schematic spice emscripten circuit vlsi cmos ngspice webgl-plot

Updated Sep 18, 2026
TypeScript

nitram2342 / degate

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Open source software for chip reverse engineering.

visualization gui library vhdl reverse-engineering image-processing verilog chip image-recognition vlsi

Updated Sep 22, 2020
C++

AUCOHL / DFFRAM

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Standard Cell Library based Memory Compiler using FF/Latch cells

verilog vlsi vlsi-physical-design vlsi-circuits electronics-design asic-design

Updated Nov 10, 2025
Verilog

cuhk-eda / Xplace

Star

Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization

gpu eda gpu-acceleration vlsi placement physical-design timing-driven routability-driven

Updated Jul 8, 2026
C++

Quang-Minh-Phung / DienTu_TKVM_Documents

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Kho tài liệu đi từ nền tảng Điện tử căn bản đến Thiết kế vi mạch, tập trung vào Front-End (RTL/DV). Tích hợp kiến thức bổ trợ cho các hướng công việc khác thuộc chuyên ngành Điện Tử. Biên soạn bởi Minh Ú (Phùng Quang Minh).