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Add driver support for i.MX93 - #7462
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Just like IMX8ULP i.MX93's EDMA2 uses a channel multiplexer to assign a peripheral to a channel. To make the driver work it's required to write the peripheral's line number to the CH_MUX register. This commit also introduces all macros necessary for EDMA2. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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SOFCI TEST |
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Can you please explain why it souldn't exist interrupt_clear() for ARM64?
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Some extra clarifications here: #7470. Please let me know if you think the commit description is not clear enough. I can try re-writing it.
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"In the case of ARM64 with GIC the interrupts are cleared after the ISR is executed (as a reference please see arm_gic_eoi() from Zephyr and arch/arm64/core/isr_wrapper.S ) so there's no need to clear them explicitly." - this is from your comment .
This was useful for me, so it might be good to add it in the commit message.
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Maybe create a separate empty macro interrupt_clear for ARM64 to avoid polluting the code with ifdefs?
i.MX93 uses V2 of the MU. This commit makes sure that all offsets are set accordingly. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since i.MX93 doesn't support PM and doesn't have an implementation for wait_for_interrupt() we need to encase the D3 preparation in an ifndef block. This commit does exacly so. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit makes sure that all macros used by the SAI driver are correct in the case of i.MX93's SAI3. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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Added suggestions pointed out by @dbaluta and @iuliana-prodan. |
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Added a more clear message for the commit introducing |
In the case of ARM64 with GIC, the interrupts are cleared after the ISR is executed (for reference please see arm_gic_eoi() and arch/arm64/core/isr_wrapper.S from Zephyr). Thanks to this, we don't need to clear them explicitly, hence there's no need for interrupt_clear() to be defined. This commit fixes linkage problems caused by the fact that interrupt_clear() is not defined on ARM64. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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SOFCI TEST |
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Intel tests are clear, feel free to merge @dbaluta |
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This PR introduces all required driver-related changes for i.MX93 platform.
Please see #7192 for PR dependency graph.