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scripts: qemu-check.sh: update READY_IPC for imx8 - #6713
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Update READY_IPC value based on changes regarding MU reset. READY_IPC value comes from: - clear GP pending interrupt #0 and thesofproject#1 from MU's xSR register; - enable GP #0 and thesofproject#1 for Host -> DSP and DSP -> Host message notification from MU's xCR register; - now interrupt host to tell it we are done booting by setting GIRn bit in MU's xCR register. So, "00 00 00 c0 00 00 04 c0" is the MU's xSR and xCR registers: xSR: c0000000 and xCR: c0040000 Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
iuliana-prodan
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LaurentiuM1234,
dbaluta,
lgirdwood and
paulstelian97
December 5, 2022 11:30
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|
This will fix |
paulstelian97
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Dec 5, 2022
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So the problem was that it boots fine but the script couldn't detect it? Fair enough!
lgirdwood
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Dec 5, 2022
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I would encourage adding more of the IP to qemu if you can, at least it would be a fall back virtual CI to prevent any critical breakages. @fredoh9 @greg-intel I assume the CI container needs updated for this qemu update ? |
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Please ignore - the script is automatic. I will rerun the CI for the blocked PR. |
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Update READY_IPC value based on changes regarding MU reset. READY_IPC value comes from:
So, "00 00 00 c0 00 00 04 c0" is the MU's xSR and xCR registers: xSR: c0000000 and xCR: c0040000
Signed-off-by: Iuliana Prodan iuliana.prodan@nxp.com