Skip to content

imx: clear general purpose pending interrupt - #6658

Merged
dbaluta merged 1 commit into
thesofproject:mainfrom
iuliana-prodan:iprodan/fw-boot-failure-after-soft-reboot
Dec 5, 2022
Merged

dbaluta merged 1 commit into
thesofproject:mainfrom
iuliana-prodan:iprodan/fw-boot-failure-after-soft-reboot

Conversation

@iuliana-prodan

Copy link
Copy Markdown
Contributor

Clear general purpose pending interrupt
before enabling interrupts between host and DSP.
The GIPn bit, from MU Status Register is cleared
by writing it as “1” in order to de-assert the
interrupt request source at the interrupt controller.

This fixes a fw loading failure after a soft reboot caused by GIP bit that was 1.
The problem was the MU which triggered endless interrupts causing timeout on Kernel side, which was waiting for FW_READY message.

Signed-off-by: Iuliana Prodan iuliana.prodan@nxp.com

@lgirdwood

Copy link
Copy Markdown
Member

SOFCI TEST

@lgirdwood

Copy link
Copy Markdown
Member

@iuliana-prodan can you check here, this PR is breaking the qemu boot on IMX ?

@iuliana-prodan

iuliana-prodan commented Nov 25, 2022 •

Copy link
Copy Markdown
Contributor Author

@iuliana-prodan can you check here, this PR is breaking the qemu boot on IMX ?

I'm looking into it.
Most probably is a qemu problem, since this is working on the actual hw.

@lgirdwood

Copy link
Copy Markdown
Member

@iuliana-prodan any update ?

@iuliana-prodan

Copy link
Copy Markdown
Contributor Author

@iuliana-prodan any update ?

Sorry for the late reply, we had some days off (National day in Romania).
I've created a PR to fix qemu boot: #6713

@lgirdwood

Copy link
Copy Markdown
Member

@iuliana-prodan any update ?

Sorry for the late reply, we had some days off (National day in Romania). I've created a PR to fix qemu boot: #6713

Qemu update merged, not sure if container needs a manual update or not. Have asked.

@lgirdwood

Copy link
Copy Markdown
Member

SOFCI TEST

Clear general purpose pending interrupt
before enabling interrupts between host and DSP.
The GIPn bit, from MU Status Register is cleared
by writing it as “1” in order to de-assert the
interrupt request source at the interrupt controller.

This fixes a fw loading failure after a soft reboot
caused by GIP bit that was 1.
The problem was the MU which triggered endless interrupts
causing timeout on Kernel side, which was waiting for
FW_READY message.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
@iuliana-prodan
iuliana-prodan force-pushed the iprodan/fw-boot-failure-after-soft-reboot branch from 311e742 to 2748d24 Compare December 5, 2022 15:03
@dbaluta
dbaluta merged commit 4a9a99a into thesofproject:main Dec 5, 2022
@marc-hb

marc-hb commented Dec 5, 2022

Copy link
Copy Markdown
Collaborator

yes docker updates are always manual (and generally rare). See discussions in

@iuliana-prodan
iuliana-prodan deleted the iprodan/fw-boot-failure-after-soft-reboot branch May 4, 2023 13:55
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

5 participants