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[BUG] glitch in test 22_05_TestDsmMulticoreSsp48000Hz32b32b2ch #4052

Closed as not planned

Description

@kkarask

Describe the bug
Glitch was found in test 22_05_TestDsmMulticoreSsp48000Hz32b32b2ch

Topology

 +----------------------------------------------+
    | +------+   +---+   +- -+   +---+   +-------+ |
    | | Host |-->|Buf|-->|Dsm|-->|Buf|-->|SSP Dai|-------+
    | +------+   +---+   +---+   +---+   +-------+ |     |
    +------------------+   ^   +-------------------+     |
                       |   |   |                         |
                       | +---+ |                         |
                       | |Buf| |                         |
                       | +---+ |                         |
                       +---^---+                         |
    +----------------------|------------------------+    |
    | +------+   +---+   +-|--+   +---+   +-------+ |    |
    | | Host |<--|Buf|<--|Dmux|<--|Buf|<--|SSP Dai|<-----+
    | +------+   +---+   +----+   +---+   +-------+ |
    +-----------------------------------------------+

To Reproduce
Run test with Diagnostic driver 22_05_TestDsmMulticoreSsp48000Hz32b32b2ch

Reproduction Rate
Sporadic.

Environment

  1. Branch name and commit hash of the 2 repositories: sof (firmware/topology) and linux (kernel driver).
    • SOF: BRANCH: main HASH: be065e5 (SOF_FW_MASTER_01.01.00.2246)
  2. Name of the platform(s) on which the bug is observed.
    • Platform: ICL RVP
  3. Test environment:
    BRANCH: master HASH: b7ed915d911acda055bbb822800b76557e9fe7de

Screenshots or console output
image

2021_04_18_00_53_06.zip

Activity

  1. added
    bugSomething isn't working as expected
    on Apr 19, 2021
  2. lgirdwood commented on Apr 19, 2021

    @lgirdwood
    Member

    @kkarask I'm assuming all is good when DSM is disabled ? It looks like we have missed a deadline and slipped some data. @slawblauciak fyi.

  3. lgirdwood commented on Apr 19, 2021

    @lgirdwood
    Member

    @kkarask I also assume that your topology is all core 0 and can you confirm if you are using low power clocks ?

  4. keyonjie commented on Apr 20, 2021

    @keyonjie
    Contributor

    @kkarask what is "SOF: BRANCH: main HASH: b7ed915d911acda"? I can't find this commit in the main branch?

  5. kkarask commented on Apr 20, 2021

    @kkarask
    Author

    @keyonjie Sorry, my mistake. Correct HASH is: be065e5

    @lgirdwood There are no glithes in other Multi core tests apart from only one issue: [(https://github.com//issues/4050)]

    All components use core = 0 except DSM = 1 in test 22_05_TestDsmMulticoreSsp48000Hz32b32b2ch.
    Regarding power clocks could you please check dma_trace_log.

  6. slawblauciak commented on Apr 27, 2021

    @slawblauciak
    Collaborator

    @kkarask can you please re-check if the issue is reproducible with the current main branch? There was a relevant fix on a different platform, I wonder if it also applies to ICL.

  7. kkarask commented on Apr 27, 2021

    @kkarask
    Author

    Hi, @slawblauciak
    Unfortunately the problem still exists on current main branch on platforms: TGL and ICL. There are glitches in whole wav files.
    Logs:
    TGL 22_06_TestDsmMulticoreSdw48000Hz24b32b2ch :

    Logs 4052 TGL.zip

    ICL 22_05_TestDsmMulticoreSsp48000Hz32b32b2ch:
    Logs 4052 ICL.zip

  8. lgirdwood commented on Apr 27, 2021

    @lgirdwood
    Member

    DSM and multicore is showing up in a few of these failures recently. @kkarask what's your take here since you are doing the bulk of the test runs.

    1. Are we seeing multicore fail sporadically without DSM ? (points to scheduling)
    2. Are we seeing DSM fail on core 0 (if possible to run on 0 - points to DSM)
      It would be good to know if these issues are more likely scheduling work on other cores or are DSM overruns that then impact the pipeline.
  9. kkarask commented on Apr 28, 2021

    @kkarask
    Author

    @lgirdwood I will run stress tests and give you answer tomorrow. We will see how fix #4088 works.

  10. kkarask commented on Apr 29, 2021

    @kkarask
    Author

    All results from stress tests will be available tomorrow. I will comment about reproduction rate.

  11. lgirdwood commented on Apr 29, 2021

    @lgirdwood
    Member

    @kkarask thanks, it occurred to me that the pcm converter/copier component is also in this pipeline and also the simple pipelines with similar glitches so could be getting stuck or some confusion between DMA and module R/W pointers.
    Btw, I can't read the logs.

  12. kkarask commented on Apr 30, 2021

    @kkarask
    Author

    @lgirdwood Logs should be readable now.
    I had some problems with reproduction due to the bug #4101 witch covers that issue.
    Reproduction rate was 1/100 counting only cases when the other bug #4101 didn't occur.

  13. 1 remaining item

  14. lgirdwood commented on May 13, 2021

    @lgirdwood
    Member

    Duplicate of simpler #4076

  15. juimonen commented on May 18, 2021

    @juimonen

    @kkarask do you have any idea when these "glitch" bugs started to appear? So do you recall running these previously at some point without these errors? Just trying to little bit bisect the area... I can't reproduce the loopback glitches with linux driver (or it is quite difficult to do at least)...

  16. kkarask commented on May 19, 2021

    @kkarask
    Author

    @juimonen Unfortunately I don't have logs, but as long as I can see the test fail on this hash: 4c1f41a I'm not sure about reason because I don't have logs:( maybe this help you a bit...

  17. added
    TGLApplies to Tiger Lake
    and removed
    duplicateThis issue or pull request already exists
    on Jun 7, 2021
  18. mwasko commented on Jun 7, 2021

    @mwasko
    Contributor

    Duplicate of simpler #4076

    This issue is specific to scenario with DSM component on Core 1 while the rest of the pipeline is on Core 0. The issue is not reproducing in case when entire pipeline is on Core 1.

  19. mwasko commented on Jun 7, 2021

    @mwasko
    Contributor

    @kkarask do you have any idea when these "glitch" bugs started to appear?

    @juimonen the issue was not reproducible on tgl-11-drop-stable branch. However when we merged scheduling refinements from tgl-11 to main branch then we started to catch quite a lot of multi-core problems (including this one). Most of the issues has already been addressed, but this one still remain - reproduced recently on tgl-13-drop-stable.

  20. added
    component-level multicoreIssues observed when scenario when pipeline components are split across different cores
    on Jun 7, 2021
  21. added
    WHLApplies to WhiskeyLake platform
    on Jun 29, 2021
  22. removed their assignment
    on Aug 2, 2021
  23. github-actions commented on Jun 19, 2025

    @github-actions

    This issue has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this issue will automatically be closed in 14 days. Note, that you can always re-open a closed issue at any time.

  24. added
    staleIssue/PR marked as stale and will be closed after 14 days if there is no activity.
    on Jun 19, 2025
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    ICLApplies to IceLake platformTGLApplies to Tiger LakeWHLApplies to WhiskeyLake platformbugSomething isn't working as expectedcomponent-level multicoreIssues observed when scenario when pipeline components are split across different coresdiagnostic driverSlim driver / diagnostic driver issuemulticoreIssues observed when not only core#0 is used.staleIssue/PR marked as stale and will be closed after 14 days if there is no activity.

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