Version 2.2.1

README.md

@@ -4,7 +4,7 @@ A native C++/CUDA inference engine for the MOSS-Image text-to-image model (5B Di
 
 The primary target is the official MOSS-Image Base and SFT models on RTX 30 series and newer GPUs, with an INT8 DiT recommended for everyday use. Other community file formats and older GPUs (Turing, Volta) are supported as secondary targets; other models are refused ([supported models](#supported-models)).
 
-Version 2.2.0. Supported: Linux x86-64 and Windows x64 (MSVC), each with a CUDA 12 and a CUDA 13 build, as a full package and a `-system-cuda` package. Turing (compute capability 7.5, e.g. RTX 2080) is supported by builds configured with `-DMOSSINFER_SM75=ON` (the `windows-msvc-cuda13-sm75` preset packages it): fp16 tensor-core GEMMs replace the bf16 ones, INT8 and INT4 ConvRot files run the INT8 GEMMs, the exact attention and the VAE run sm_75 kernels, all three quality tiers work, and an unset attention resolves to `exact`. See [docs/sm75.md](docs/sm75.md) for what runs, the measured speed on an RTX 2080 Ti and the remaining gaps. Volta (Tesla V100, sm_70) is supported by the CUDA 12 `linux-cuda12-sm70` preset; see [docs/sm70.md](docs/sm70.md) for its kernels, validation and performance. Other GPUs (AMD, Intel, older NVIDIA) can run txt2img at the reference tier through `moss-infer-vulkan`, a separate and slower Vulkan program in its own package ([docs/vulkan.md](docs/vulkan.md)); on Linux, `moss-infer-hip`, a separate ROCm 7 program, runs it on AMD GPUs: built for gfx1100, gfx1200 and gfx1201 (Radeon RX 7900 and RX 9000), validated on gfx1200 (RX 9060 XT) ([docs/hip.md](docs/hip.md)). The full support matrix is in [docs/integration.md](docs/integration.md#support-status).
+Version 2.2.1. Supported: Linux x86-64 and Windows x64 (MSVC), each with a CUDA 12 and a CUDA 13 build, as a full package and a `-system-cuda` package. Turing (compute capability 7.5, e.g. RTX 2080) is supported by builds configured with `-DMOSSINFER_SM75=ON` (the `windows-msvc-cuda13-sm75` preset packages it): fp16 tensor-core GEMMs replace the bf16 ones, INT8 and INT4 ConvRot files run the INT8 GEMMs, the exact attention and the VAE run sm_75 kernels, all three quality tiers work, and an unset attention resolves to `exact`. See [docs/sm75.md](docs/sm75.md) for what runs, the measured speed on an RTX 2080 Ti and the remaining gaps. Volta (Tesla V100, sm_70) is supported by the CUDA 12 `linux-cuda12-sm70` preset; see [docs/sm70.md](docs/sm70.md) for its kernels, validation and performance. Other GPUs (AMD, Intel, older NVIDIA) can run txt2img at the reference tier through `moss-infer-vulkan`, a separate and slower Vulkan program in its own package ([docs/vulkan.md](docs/vulkan.md)); on Linux, `moss-infer-hip`, a separate ROCm 7 program, runs it on AMD GPUs: built for gfx1100, gfx1200 and gfx1201 (Radeon RX 7900 and RX 9000), validated on gfx1200 (RX 9060 XT) ([docs/hip.md](docs/hip.md)). The full support matrix is in [docs/integration.md](docs/integration.md#support-status).
 
 The caller picks the quality tier: `reference` (bf16, exact), `high` (the loaded DiT's GEMMs with 8-bit attention) or `turbo` (a 4-bit DiT). An INT8 DiT with `high` is the everyday choice: 2.5 times the bf16 speed on an RTX 5090, in 40 % less VRAM ([performance](docs/integration.md#performance)). Upgrading from 1.x: [migration](docs/integration.md#migrating-from-1x).
 
@@ -57,7 +57,7 @@ The engine runs one architecture, MOSS-Image: the 5B DiT, the Qwen3.5-9B text en
 | DiT file | INT4 ConvRot (tier `turbo`), NVFP4 (tier `turbo`, RTX 50 only); GGUF Q8_0, Q6_K, Q5_K, Q4_K, Q4_0, BF16 and F16, converted once on first load |
 | Text encoder file | INT8 ConvRot, W4A8 GPTQ |
 | VAE file | FLUX.2 VAE, full or small |
-| LoRAs and adapters | PEFT, kohya and LyCORIS LoHa LoRAs, distill LoRAs and bundles, the colour and depth control adapter. Runtime LoRAs and control adapters need Ampere or newer |
+| LoRAs and adapters | PEFT, kohya and LyCORIS LoHa LoRAs, distill LoRAs and bundles, the colour and depth control adapter. Control adapters need Ampere or newer |
 
 Not supported: other OpenMOSS models (MOSS-VL, MOVA, MOSS-TTS and others), text encoders of other sizes, torchao and FP8 weights, and MLX, SDNQ, DFloat11 and PyTorch `.bin` / `.pt` files. [docs/integration.md](docs/integration.md#supported-models) lists the files and revisions, how each one loads, and what the engine says when it refuses one.
 

docs/c-api.md

@@ -289,7 +289,7 @@ Limits, checked before any pixel is read: each side 1 to 16384, at most 64,000,0
 - `denoise_strength` unset with an init image is 0.75. An explicit 1 with an init image and no mask is txt2img: the image is not used, and `MI_TEXT_IMAGE_NOTE` says so. 0 runs no step: the result is the image's VAE round trip.
 - The steps that run: of a pass's N scheduled steps (after snapping), the first `int(N - N * strength)` are skipped. `mi_result_steps_scheduled()` and the progress callback's `total_steps` count the steps that run, both passes of a hires fix included.
 - The `DATASPACE` sampler cannot start from an image (img2img, inpainting, hires fix).
-- An `MOSSINFER_SM75` build has no VAE encoder kernel: img2img, inpainting, reference images and the hires fix are refused up front with `MI_ERR_NOT_SUPPORTED`, before anything is loaded or planned; txt2img still runs. Runtime LoRAs and control adapters are refused the same way (their GEMM kernels are sm_80+) ([sm75.md](sm75.md#not-supported-on-sm75-yet)).
+- On an `MOSSINFER_SM75` build, img2img, inpainting, reference images and the hires fix run the VAE encoder as fp32 SIMT convolutions, and runtime LoRAs are merged into the weights at load. Control adapters are refused up front with `MI_ERR_NOT_SUPPORTED`, before anything is loaded or planned (their fused GEMM kernels are sm_80+) ([sm75.md](sm75.md#limits-on-sm_75)).
 
 | `mi_mask_encoding` | Values |
 |---|---|

docs/integration.md

@@ -8,7 +8,7 @@ The reference documents are:
 
 This page does not repeat them. It explains how the pieces fit together, and which choices the launcher has to make.
 
-Version 2.2.0 (ABI 1, server protocol 2). See [Versioning](#versioning) for what stays compatible, and [Migrating from 1.x](#migrating-from-1x) for what changed.
+Version 2.2.1 (ABI 1, server protocol 2). See [Versioning](#versioning) for what stays compatible, and [Migrating from 1.x](#migrating-from-1x) for what changed.
 
 MossInfer is a low-level engine: it runs what the caller asks for, refuses what the hardware or the files cannot run with the reason, and reports what ran. It does not choose for the caller. The launcher picks the tier, the memory mode and the budgets; [Performance](#performance) says what each costs and gives.
 
@@ -19,18 +19,18 @@ MossInfer is a low-level engine: it runs what the caller asks for, refuses what
 | Area | What works |
 |---|---|
 | Platform | Linux x86-64 and Windows x64 (MSVC), each in a `cu12` and a `cu13` flavour, as a full package and a `-system-cuda` package. CI builds, packages and runs the CPU tests of all four standard flavours, plus the Windows CUDA 13 Turing build (`-sm75`) and Linux CUDA 12 Volta build (`-sm70`); GPU runs are verified on Linux `cu13`, and on Linux `cu12` for Volta. |
-| GPUs | NVIDIA compute capability 8.x and 12.x: RTX 30xx, RTX 40xx, RTX 50xx, A100/A10/A40, L4/L40, RTX PRO Blackwell. Compute capability 7.5 (Turing: RTX 20xx, T4, GTX 16xx) with a build configured `-DMOSSINFER_SM75=ON`: the bf16 GEMMs run as fp16 tensor-core GEMMs, INT8/INT4 ConvRot files run the INT8 GEMMs (INT4 through the INT8 unpack fallback), the exact attention and the VAE use the sm_75 kernels, and an unset attention resolves to `exact` (there is no 8-bit attention kernel on Turing). See [sm75.md](sm75.md). Compute capability 7.0 (Volta, Tesla V100) with CUDA 12 and `-DMOSSINFER_SM70=ON`: dedicated fp16 tensor-core attention and exact INT8 GEMMs, sharing the Turing layer’s conversion and VAE paths. See [sm70.md](sm70.md). |
+| GPUs | NVIDIA compute capability 8.x and 12.x: RTX 30xx, RTX 40xx, RTX 50xx, A100/A10/A40, L4/L40, RTX PRO Blackwell. Compute capability 7.5 (Turing: RTX 20xx, T4, GTX 16xx) with a build configured `-DMOSSINFER_SM75=ON`: the bf16 GEMMs run as fp16 tensor-core GEMMs, INT8/INT4 ConvRot files run the INT8 GEMMs (INT4 through the INT8 unpack fallback), the exact attention and the VAE use the sm_75 kernels, and an unset attention resolves to `exact` (Turing's `q8_fp16` runs only when asked for). See [sm75.md](sm75.md). Compute capability 7.0 (Volta, Tesla V100) with CUDA 12 and `-DMOSSINFER_SM70=ON`: dedicated fp16 tensor-core attention and exact INT8 GEMMs, sharing the Turing layer’s conversion and VAE paths. See [sm70.md](sm70.md). |
 | Models | MOSS-Image Base and SFT only: the official Hugging Face folders (bf16), read in place, and fine-tunes with the same architecture; other models are refused when they load. See [Supported models](#supported-models). |
 | Component model files | a single-file DiT, text encoder or VAE next to the bundle folder: ComfyUI and community files, INT8 ConvRot, INT4 ConvRot and NVFP4 DiT (NVFP4 on RTX 50 only), INT8 ConvRot and W4A8 text encoder (`dit_file`, `text_encoder_file`, `vae_file`); community GGUF DiTs (Q8_0, Q6_K, Q5_K, Q4_K, Q4_0, BF16, F16), converted once into INT8 ConvRot or bf16 ([GGUF DiT files](#gguf-dit-files)) |
 | Generation | text-to-image with the official app's parameters: prompt, negative prompt, size, steps, CFG, shift, seed, skip layers, skip-layer guidance |
-| Quality tier | required, the caller's choice: `reference` (the DiT's bf16 GEMMs, exact attention), `high` (the loaded DiT's INT8 or bf16 GEMMs, 8-bit attention), `turbo` (a 4-bit DiT: INT4, or NVFP4 on an RTX 50, 8-bit attention); a tier the loaded files cannot run is refused with the reason, and the tier that ran is reported. On an `MOSSINFER_SM75` build all three run; 8-bit attention becomes `exact` ([sm75.md](sm75.md#tiers-on-sm_75)) |
-| Image input | img2img (an init image and a denoise strength) and inpainting (a mask), with crop / fit / stretch resizing; pixels (library) or PNG / JPEG files (both surfaces). Needs the VAE encoder, so an `MOSSINFER_SM75` build refuses it with `not_supported` ([sm75.md](sm75.md#not-supported-on-sm75-yet)) |
-| Hires fix | a second pass at a larger size from the first pass upscaled, with its own strength and steps. Encodes the upscaled image, so an `MOSSINFER_SM75` build refuses it on Turing with `not_supported` ([sm75.md](sm75.md#not-supported-on-sm75-yet)) |
+| Quality tier | required, the caller's choice: `reference` (the DiT's bf16 GEMMs, exact attention), `high` (the loaded DiT's INT8 or bf16 GEMMs, 8-bit attention), `turbo` (a 4-bit DiT: INT4, or NVFP4 on an RTX 50, 8-bit attention); a tier the loaded files cannot run is refused with the reason, and the tier that ran is reported. On an `MOSSINFER_SM75` build all three run; an unset attention resolves to `exact` ([sm75.md](sm75.md#tiers-on-sm_75)) |
+| Image input | img2img (an init image and a denoise strength) and inpainting (a mask), with crop / fit / stretch resizing; pixels (library) or PNG / JPEG files (both surfaces). Needs the VAE encoder, which runs as fp32 SIMT convolutions on an `MOSSINFER_SM75` build ([sm75.md](sm75.md#limits-on-sm_75)) |
+| Hires fix | a second pass at a larger size from the first pass upscaled, with its own strength and steps. Encodes the upscaled image (fp32 SIMT convolutions on an `MOSSINFER_SM75` build) |
 | Distill bundles | few-step distilled checkpoints shipped as a bundle folder (time embedding, LoRA, data-space sampler parameters), applied per engine and per generation |
 | Control adapters | a control adapter file (a LoRA with a widened DiT input embedder, e.g. the MOSS-Image color / depth control) with one conditioning image per kind, each with a strength and a step window; pixels (library) or PNG / JPEG files (both surfaces). Opt-in. It is a LoRA, so an `MOSSINFER_SM75` build refuses it with `not_supported` |
 | Lossy accelerators | CFG truncation and a step cache (First-Block Cache), off by default. Opt-in: they change the image. |
-| Attention mode | exact (FlashAttention-2) or one of four 8-bit modes, as an override of the tier's default. An `-DMOSSINFER_SM75=ON` build has only `exact` (its own m16n8k8 kernel); the tier's 8-bit default resolves to `exact` with the reason saying so ([sm75.md](sm75.md#not-supported-on-sm75-yet)) |
-| LoRAs | a list of files with strengths per generation, applied at run time: kohya, PEFT / diffusers, LyCORIS LoHa and LoKr, and full deltas; per-file reports and warnings. Their GEMM kernels are sm_80+, so an `MOSSINFER_SM75` build refuses a request that carries LoRAs with `not_supported` |
+| Attention mode | exact (FlashAttention-2) or one of four 8-bit modes, as an override of the tier's default. An `-DMOSSINFER_SM75=ON` build runs `exact` (its own m16n8k8 kernel) and, on Turing, `q8_fp16` when it is given; the tier's 8-bit default resolves to `exact` with the reason saying so ([sm75.md](sm75.md#limits-on-sm_75)) |
+| LoRAs | a list of files with strengths per generation, applied at run time: kohya, PEFT / diffusers, LyCORIS LoHa and LoKr, and full deltas; per-file reports and warnings. Their fused GEMM kernels are sm_80+, so an `MOSSINFER_SM75` build merges them into the weights at load (reported as `merged`) |
 | Samplers and schedulers | 9 samplers (Euler, AB2, Euler ancestral, Heun, DPM++ 2M, DPM++ 2M SDE, ER-SDE, RES multistep, data-space), 7 schedulers, noise layout and source, eta, s_noise, flow multiplier |
 | Preview | a latent preview image during sampling, every N steps (library: a callback with RGB8; server: a PNG rewritten in place and a `preview` event) |
 | PNG metadata | the generation settings embedded in the PNG (`generation` record, schema `mossinfer.generation/1`, plus `parameters`), the prompts optional |
@@ -205,7 +205,7 @@ cmake --build --preset linux-cuda13 -j8
 CUDA_VISIBLE_DEVICES="" ctest --preset linux-cuda13 -L '^cpu$'
 cmake --install build/linux-cuda13                # -> build/linux-cuda13/install
 cmake --install build/linux-cuda13 --component Unspecified --prefix build/linux-cuda13/install-system-cuda
-(cd build/linux-cuda13 && cpack --config CPackConfig.cmake)   # -> mossinfer-2.2.0-linux-cu13-x86_64.{tar.gz,zip}
+(cd build/linux-cuda13 && cpack --config CPackConfig.cmake)   # -> mossinfer-2.2.1-linux-cu13-x86_64.{tar.gz,zip}
 ```
 
 - **glibc:** the archive needs the glibc of the machine that built it, or a newer one. Build on the oldest distribution you want to support. CI uses Ubuntu 22.04, which gives glibc 2.35. A build from a rolling distribution such as Arch will not start on Ubuntu LTS.
@@ -555,7 +555,7 @@ Attach it to bug reports, together with the server's stderr log and `hello`'s `p
 ## Versioning
 
 - **Version numbers.**
-  - `mi_version()` returns the release version (`2.2.0`).
+  - `mi_version()` returns the release version (`2.2.1`).
   - `mi_abi_version()` and `MI_ABI_VERSION` give the binary interface version (1).
   - The server's `hello` reports its `protocol_version` (2).
 - **Additive changes keep ABI 1:** new functions, new fields at the end of structs, new enum values, new optional server parameters and events.

docs/server-protocol.md

@@ -8,7 +8,7 @@
 ```
 moss-server                     # speak the protocol on stdin/stdout
 moss-server --parent-pid <pid>  # the same, and exit when process <pid> (the launcher) exits
-moss-server --version           # "moss-server 2.2.0 (protocol 2, ABI 1)"
+moss-server --version           # "moss-server 2.2.1 (protocol 2, ABI 1)"
 ```
 
 ### `--parent-pid`

docs/sm70.md

@@ -49,9 +49,9 @@ causal mask. Fully masked query rows return zero and a positive-infinite log-sum
 Its fp16 operand range and rounding limitations are the same as [the Turing layer](sm75.md#numerics).
 
 The quality policy also follows Turing: an unset attention mode resolves to `exact` with an explicit reason. Explicit
-8-bit attention and NVFP4 are refused. The fused bf16 block kernels, runtime LoRAs, control adapters, VAE encoding
-(img2img, inpainting and references), and hires fix retain the existing sm_7x refusal/fallback policy. No sm_80 kernel
-is launched as a substitute for a missing Volta implementation.
+8-bit attention and NVFP4 are refused. Runtime LoRAs (merged at load), VAE encoding (img2img, inpainting and
+references) and the hires fix take the Turing paths; control adapters are refused, and the fused bf16 block kernels are
+not used. No sm_80 kernel is launched as a substitute for a missing Volta implementation.
 
 ## Tiles and memory
 

docs/sm75.md

@@ -17,7 +17,7 @@ cmake --preset windows-msvc-cuda13-sm75
 cmake --build --preset windows-msvc-cuda13-sm75
 ctest --preset windows-msvc-cuda13-sm75 -L '^cpu$'
 cpack --config build/windows-msvc-cuda13-sm75/CPackConfig.cmake -B build/windows-msvc-cuda13-sm75
-# -> build/windows-msvc-cuda13-sm75/mossinfer-2.2.0-windows-cu13-x86_64-sm75.zip
+# -> build/windows-msvc-cuda13-sm75/mossinfer-2.2.1-windows-cu13-x86_64-sm75.zip
 ```
 
 Any other preset takes the option too (`-DMOSSINFER_SM75=ON`), e.g. a Linux build from a custom preset; the ordinary

include/mossinfer/mossinfer.h

@@ -75,7 +75,7 @@ extern "C" {
 
 #define MI_VERSION_MAJOR 2
 #define MI_VERSION_MINOR 2
-#define MI_VERSION_PATCH 0
+#define MI_VERSION_PATCH 1
 /* Incremented on every incompatible change of the binary interface (see the conventions above). */
 #define MI_ABI_VERSION 1