A small vector core, its reference simulator, and a compiler that lowers quantized neural networks onto its 16 instructions.
-
Updated
Jul 28, 2026 - Python
#
vector-processor
Here are 3 public repositories matching this topic...
Hand-written SystemVerilog SIMD core (Fall 2025) followed by an Allo DSL/HLS redesign adding INT8 GEMM, ReLU, and fusion kernels (Spring 2026), targeting the Nexys A7.
-
Updated
May 1, 2026 - Python
functional and timing simulator for VMIPS-like vector architecture
-
Updated
May 3, 2026 - Python
Add this topic to your repo
To associate your repository with the vector-processor topic, visit your repo's landing page and select "manage topics."