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ace: copier: hda: synchronized FPI updates of HD-A gateways #7964
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@@ -433,6 +433,29 @@ static uint32_t host_get_copy_bytes_normal(struct host_data *hd, struct comp_dev | |
| return ALIGN_DOWN(dma_copy_bytes, hd->dma_copy_align); | ||
| } | ||
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| #if CONFIG_HOST_DMA_STREAM_SYNCHRONIZATION | ||
| static inline bool stream_sync(struct host_data *hd, struct comp_dev *dev) | ||
| { | ||
| if (!hd->is_grouped) | ||
| return true; | ||
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| uint64_t current_time = k_cycle_get_64(); | ||
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| if (current_time >= hd->next_sync) { | ||
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Collaborator
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Having timer logic without wrap-around handling is always a bit iffy, but given we have explicit 64bit counter, it would seem this is safe. Even with a 10x faster system clock, this would still take thousands of years to wrap around. I think current uptime record holder is still the one Cisco switch that is around 26 years now, so we have some safety margin -> https://en.wikipedia.org/wiki/Uptime
Member
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ack, worth an inline comment here so that no one tries to fix later on. |
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| hd->next_sync = current_time + hd->period_in_cycles; | ||
| comp_dbg(dev, "hd(%p) next sync = %llu", hd, hd->next_sync); | ||
| return true; | ||
| } | ||
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| return false; | ||
| } | ||
| #else | ||
| static inline bool stream_sync(struct host_data *hd, struct comp_dev *dev) | ||
| { | ||
| return true; | ||
| } | ||
| #endif | ||
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| /** | ||
| * Performs copy operation for host component working in normal mode. | ||
| * It means DMA works continuously and doesn't need reconfiguration. | ||
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@@ -471,11 +494,14 @@ static int host_copy_normal(struct host_data *hd, struct comp_dev *dev, copy_cal | |
| audio_stream_get_size(&buffer_c->stream) < hd->period_bytes << 3 || | ||
| audio_stream_get_size(&buffer_c->stream) - hd->partial_size <= | ||
| (2 + threshold) * hd->period_bytes) { | ||
| ret = dma_reload(hd->chan->dma->z_dev, hd->chan->index, 0, 0, hd->partial_size); | ||
| if (ret < 0) | ||
| comp_err(dev, "host_copy_normal(): dma_copy() failed, ret = %u", ret); | ||
| if (stream_sync(hd, dev)) { | ||
| ret = dma_reload(hd->chan->dma->z_dev, hd->chan->index, 0, 0, | ||
| hd->partial_size); | ||
| if (ret < 0) | ||
| comp_err(dev, "dma_reload() failed, ret = %u", ret); | ||
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| hd->partial_size = 0; | ||
| hd->partial_size = 0; | ||
| } | ||
| } | ||
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| buffer_release(buffer_c); | ||
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@@ -544,15 +544,18 @@ struct comp_driver_info { | |
| * Audio component base configuration from IPC at creation. | ||
| */ | ||
| struct comp_ipc_config { | ||
| uint32_t core; /**< core we run on */ | ||
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lgirdwood marked this conversation as resolved.
Resolved
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| uint32_t id; /**< component id */ | ||
| uint32_t pipeline_id; /**< component pipeline id */ | ||
| uint32_t proc_domain; /**< processing domain - LL or DP */ | ||
| uint32_t core; /**< core we run on */ | ||
| uint32_t id; /**< component id */ | ||
| uint32_t pipeline_id; /**< component pipeline id */ | ||
| uint32_t proc_domain; /**< processing domain - LL or DP */ | ||
| enum sof_comp_type type; /**< component type */ | ||
| uint32_t periods_sink; /**< 0 means variable */ | ||
| uint32_t periods_source;/**< 0 means variable */ | ||
| uint32_t frame_fmt; /**< SOF_IPC_FRAME_ */ | ||
| uint32_t xrun_action; /**< action we should take on XRUN */ | ||
| uint32_t periods_sink; /**< 0 means variable */ | ||
| uint32_t periods_source; /**< 0 means variable */ | ||
| uint32_t frame_fmt; /**< SOF_IPC_FRAME_ */ | ||
| uint32_t xrun_action; /**< action we should take on XRUN */ | ||
| #if CONFIG_IPC_MAJOR_4 | ||
| uint32_t ipc_config_size; /**< size of a config received by ipc */ | ||
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Collaborator
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. can we please leave out the formatting changes to see it is easy to see that only 1 field is added? And btw won't this break IPC3? Should this be within #if CONFIG_MAJOR_IPC4?
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. can comp_ipc_config be changed? not sure why not left some redundancy space for later adding, like uint32_t valid_fmt to align internal usage.
Contributor
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. @btian1 can you explain exactly what you mean? Sorry, but I don't quite understand what your comment means.
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I mean:
Contributor
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. From what I saw in code https://github.com/thesofproject/sof/blob/main/src/ipc/ipc4/helper.c#L81-L105
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I did not have a change to check driver, just guess driver side also have a similar copy, if not, how to pass it from driver to fw(sof)? |
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| #endif | ||
| }; | ||
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| /** | ||
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