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west.yml: upgrade Zephyr revision - Restore IDC interrupt on D3 exit - #7917
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RanderWang
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July 11, 2023 05:32
After exiting D3 state if IMR context save is enabled, IDC interrupt must be re-enabled again for all cores. It fixes multicore CI test issue. 431108d89e175: intel_adsp: ace: Restore IDC interrupt on D3 exit Signed-off-by: Rander Wang <rander.wang@intel.com>
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aborisovich
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lgirdwood
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@abonislawski FYI. Can you please review? |
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One multi-pause-resume fail in https://sof-ci.01.org/sofpr/PR7917/build10606/devicetest/index.html , which is a known bug. Verify-kernel log fail in https://sof-ci.01.org/sofpr/PR7917/build10605/devicetest/index.html , not related to this PR. |
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After exiting D3 state if IMR context save is enabled, IDC interrupt must be re-enabled again for all cores. It fixes multicore CI test issue.
431108d89e175: intel_adsp: ace: Restore IDC interrupt on D3 exit
fix #7885 [MTL][Multicore] IPC timed out for GLB_CREATE_PIPELINE