Add support for mtk mt8186 platform by tinghan-shen · Pull Request #5239 · thesofproject/sof

tinghan-shen · 2022-01-21T10:08:37Z

Hi,

I'm a chromebook project developer at Mediatek and working on SOF FW on mt8186.

The other co-worker is Allen Cheng (KuanHsun Cheng).

There are some drivers and platform codes we have been verified on mt8186 EVB.

We want to add mt8186 platform support in sof project.

mt8186: Cadence HiFi-5 DSP, single core, 4 dais , 4 dmas and 48k 16 bits.

Similar to mt8195 except changing the DSP core version.

Please let me know if there is any questions.

Thanks.

sofci · 2022-01-21T10:10:08Z

Can one of the admins verify this patch?

reply test this please to run this test once

gkbldcig · 2022-01-21T10:26:10Z

Can one of the admins verify this patch?

afq984 · 2022-01-21T10:43:27Z

test this please

afq984 · 2022-01-21T10:44:04Z

approved the github actions, not sure if I can run intel CI though

dbaluta · 2022-01-21T10:58:07Z

Looks good to me. Do you also have a gcc based toolchain for this? It would be useful to add it in the CI build scripts so that we can catch early if something breaks.

tinghan-shen · 2022-01-21T11:32:18Z

Looks good to me. Do you also have a gcc based toolchain for this? It would be useful to add it in the CI build scripts so that we can catch early if something breaks.

Ok, I'll prepare a patch for this.
thanks the advice.

dbaluta · 2022-01-21T11:47:11Z

Ok, I'll prepare a patch for this.
thanks the advice.

You can have a look at https://github.com/thesofproject/crosstool-ng/ for all suppported platforms. I also think we have a repo to upload the toolchain binary?

@lgirdwood i don't remember where we store the toochains.

lgirdwood · 2022-01-21T13:42:15Z

Ok, I'll prepare a patch for this.
thanks the advice.

You can have a look at https://github.com/thesofproject/crosstool-ng/ for all suppported platforms. I also think we have a repo to upload the toolchain binary?

@lgirdwood i don't remember where we store the toochains.

We need to do

add overlay to xtensa-overlays repo
add config file to crosstool-ng repo (binaries are uploaded to ct-ng downloads section)
add binaries to container usually @marc-hb or @greg-intel can do this.
add to CI (same folks as 3).

yaochunhung · 2022-01-21T14:52:28Z

@lgirdwood One thing needs your advise. May I know if qemu is required for CI? or qemu is for git actions? We are preparing qemu for mt8195 now. wenliangwu/qemu@5f259f1 , which is based on v5. 2.0. I am wondering what thing need to do when the qemu patch are ready. Thanks in advance.

lgirdwood · 2022-01-21T17:00:11Z

@lgirdwood One thing needs your advise. May I know if qemu is required for CI? or qemu is for git actions? We are preparing qemu for mt8195 now. wenliangwu/qemu@5f259f1 , which is based on v5. 2.0. I am wondering what thing need to do when the qemu patch are ready. Thanks in advance.

This can go in the qemu branch and then be added to the CI container. @marc-hb and @greg-intel can help with this.

Fwiw, we are moving towards Renode for emulation (timeline TBD) as it has several key advantages over qemu for our needs. @cujomalainey can give you more details.

lgirdwood · 2022-01-21T17:01:33Z

@kkarask can you comment on the CI, this PR should not fail any Intel specific tests. Good to merge ?

lgirdwood · 2022-01-21T17:03:38Z

@kkarask can you comment on the CI, this PR should not fail any Intel specific tests. Good to merge ?

Please ignore, it's Jenkins CI.

lgirdwood · 2022-01-21T17:04:03Z

SOFCI TEST

lgirdwood · 2022-01-21T17:04:13Z

Retry CI

cujomalainey · 2022-01-21T17:05:12Z

Fwiw, we are moving towards Renode for emulation (timeline TBD) as it has several key advantages over qemu for our needs. @cujomalainey can give you more details.

Unfortunately the timeline has been disrupted a bit due to budget planning schedules being misaligned. Only basic xtensa is working right now with zephyr. Working to get more added.

marc-hb · 2022-01-21T17:46:40Z

Do you also have a gcc based toolchain for this?

May I know if qemu is required for CI? or qemu is for git actions?

Please have a look at the discussions and (small) changes in #5202 that was just merged.

Add xtensa headers for mtk mt8186 platform. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

marc-hb

Most of this PR looks like copy/paste of mt8195

marc-hb · 2022-01-24T05:37:53Z

@kkarask https://sof-ci.01.org/sof-pr-viewer/#/build/PR5239/build8393711 has very strange and new failures again... is there some major activity going on?

kuanhsuncheng

I check the current .github/workflows/pull-request.yml. there is no mt8195 strategy. should we update also ?

lyakh · 2022-01-24T09:17:31Z

this is in units, half of what was read in line 61 from MTK_OSTIMER_CUR_L because of multiplication in line 65, is this correct?

This is intended. The underlying HW is a 32-bit count-down timer.
It's used to set the difference between the current tick and next tick triggering reschedule.

marc-hb · 2022-01-24T16:14:03Z

I check the current .github/workflows/pull-request.yml. there is no mt8195 strategy. should we update also ?

If you have the gcc toolchain ready in the Docker image then yes of course.

lgirdwood · 2022-01-24T17:00:13Z

@tinghan-shen @kuanhsuncheng please someone from MTK approve PR before merge.

cujomalainey · 2022-01-25T00:22:38Z

@yaochunhung

cujomalainey · 2022-01-25T00:28:51Z

just curious why this is all inline? if you add another call to your macro below it will duplicate all this code.

It's because some platforms also use it. I thought that maybe it's the way for IRQ handling at here.

for example,
https://github.com/thesofproject/sof/blob/main/src/drivers/amd/renoir/interrupt.c#L128

https://github.com/thesofproject/sof/blob/main/src/drivers/imx/interrupt-irqsteer.c#L324

Interesting @lgirdwood this seems rather inflated, what are your thoughts here?

Yeah, these could be optimized. Lets merge this first and get the build results as we could make the same change to all platforms. @tinghan-shen pls can you try this change and report any size changes to the binary. Thanks.

I think NXP would see the biggest effect since they have multiple IRQs @dbaluta

I tried to build mt8186 on both gcc11 and xcc, and compare the size of sof.ri.
No difference on gcc11.
64 bytes larger on xcc after remove "inline".

cujomalainey · 2022-01-25T00:32:55Z

why not just disable IDC?

This file is added to solve build errors. mt8186 doesn't enable the configuration to build src/idc/idc.c.

tinghan-shen · 2022-01-25T03:04:32Z

Here are the PRs for mt8186 gcc toolchain.

thesofproject/crosstool-ng#12
https://github.com/thesofproject/crosstool-ng/pull/12

yaochunhung

@tinghan-shen @kuanhsuncheng please see my comments and feel free to discuss with me. thanks.

Add memory layout and register address for mtk mt8186 Cache I-Cache: 64KB, 4-way Associativity D-Cache: 128KB, 4-way Associativity External Memory DRAM: DSP can access DRAM shared with CPU L2TCM: 512KB DSP SRAM POOL Currently, use phy addr:0x60000000, size:0x1000000 dma phy addr: 0x61000000, size: 0x0100000 Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Add interrupt, timer, and ipc drivers for mt8186 mt8186 DSP has 32 interrupts. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

lgirdwood · 2022-01-25T14:07:39Z

@kkarask can you check CI, as this PR is for MTK platform only and should not fail Intel tests. Thanks !

lgirdwood

We need to keep the notifier UUID unchanged.

yaochunhung · 2022-01-26T01:07:22Z

Do you also have a gcc based toolchain for this?

May I know if qemu is required for CI? or qemu is for git actions?

Please have a look at the discussions and (small) changes in #5202 that was just merged.

@marc-hb Thanks for providing information. @lgirdwood has already helped to merge mt8195 qemu patch thesofproject/qemu@b85c079. but I am not sure how to add mt8195 to thesofproject/sofqemu (it looks like here https://hub.docker.com/r/thesofproject/sofqemu/tags )and still anything to do except add platform information to pull-request.yml. Besides, may I need to add docker_build like
66234f0#diff-edde3c23b72c58bc38db847aede15fb3e20078318397825da9a7ef2fa48801b5? Please help to advice. Thanks.

mt8186 platform integrates a single-core HIFI5 DSP. The DSP operates at different highest clock frequencies with corresponding voltage, 800MHz(0.8v)/400MHz(0.7v)/300MHz(0.65v)/26MHz(0.6v). The DSP core and DMA in DSP subsys both can access DRAM directly. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Add default config for mt8186 platform. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Add CMakefile for mtk mt8186 platform to build. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Add mt8186 to Kconfig Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

tinghan-shen requested review from akloniex, dbaluta, lbetlej, lgirdwood, marc-hb, mmaka1 and plbossart as code owners January 21, 2022 10:08

kuanhsuncheng requested review from afq984, cujomalainey, kuanhsuncheng and yaochunhung January 21, 2022 10:16

dbaluta approved these changes Jan 21, 2022

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lgirdwood approved these changes Jan 21, 2022

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platform: mtk: add xtensa headers for mt8186

0acad54

Add xtensa headers for mtk mt8186 platform. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

marc-hb requested a review from juimonen January 24, 2022 05:25

marc-hb reviewed Jan 24, 2022

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Comment thread scripts/xtensa-build-all.sh Outdated

kuanhsuncheng reviewed Jan 24, 2022

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Comment thread src/platform/mt8186/include/platform/drivers/interrupt.h Outdated

kuanhsuncheng reviewed Jan 24, 2022

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lyakh reviewed Jan 24, 2022

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cujomalainey reviewed Jan 25, 2022

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kuanhsuncheng approved these changes Jan 25, 2022

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yaochunhung reviewed Jan 25, 2022

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tinghan-shen added 2 commits January 25, 2022 19:36

drivers: mtk: Add drivers for mt8186

7f9db49

Add interrupt, timer, and ipc drivers for mt8186 mt8186 DSP has 32 interrupts. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

tinghan-shen requested a review from libinyang as a code owner January 25, 2022 11:37

kuanhsuncheng approved these changes Jan 25, 2022

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yaochunhung approved these changes Jan 25, 2022

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lgirdwood requested changes Jan 25, 2022

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Comment thread src/lib/notifier.c Outdated

tinghan-shen added 4 commits January 26, 2022 11:52

config: Add default config for mt8186

0bb9eca

Add default config for mt8186 platform. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

platform: Add build support for mtk mt8186 platform

63a781e

Add CMakefile for mtk mt8186 platform to build. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

platform: Add mt8186 to Kconfig

0def825

Add mt8186 to Kconfig Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

lgirdwood approved these changes Jan 26, 2022

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lgirdwood merged commit 59a32d5 into thesofproject:main Jan 26, 2022

tinghan-shen mentioned this pull request Feb 8, 2022

config: Add mt8186.toml thesofproject/rimage#89

Merged

marc-hb mentioned this pull request Feb 18, 2022

[SKIP CI] .github: add mt8186 and mt8195 to "build-only" #5386

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