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Pipeline 3 periods - #3580
Pipeline 3 periods#3580libinyang wants to merge 2 commits into
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This patch allows to set DAI_PERIODS in pipeline manually. Signed-off-by: Libin Yang <libin.yang@intel.com>
…-rt715 This patch assigns 3 periods audio buffer in muxdemux pipelines in sof-icl-rt711-rt1308-rt715-hdmi.m4. Signed-off-by: Libin Yang <libin.yang@intel.com>
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Someone will have to explain to me why we keep adding buffers. Why would a demux need 3 periods, and not a mixer then? |
To be honest, I don't have much knowledge about this. This patch is based on @lgirdwood 's suggestion. @lgirdwood Could you please help answer @plbossart 's question? Thanks. |
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@libinyang @plbossart this 3 periods was helping us to pinpoint the issue for demux. So basically this was giving more "time" for the demux to do its thing (which in 8 channels set in matrix is currently doing something strange). Quick fix for topology is here: Proper fix for demux is here: so both above PR's can go in, they should not mess with each other and they are so I think we can close this, thanks. |
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@juimonen If we are using more channels than 2, let's say, 8 channels. We still need similar patch like this, right? |
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@libinyang not sure... I'm not totally on top of what happened when the distortion appeared... so was it actually a performance limit issue or something that demux was just writing to wrong place and causing it, or perhaps something else. it should be tested after @bkokoszx demux fix with maximum 8 channel streams. |
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@juimonen do we still need this workaround ? |
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@lgirdwood no, let's close |
This patch set supports to set 3 period buffers in the pipeline. And sof-icl-rt711-rt1308-rt715 uses 3 period buffers in muxdemux pipelines. With 3 period buffers, FW can have more buffer to process the mux/demux.