Dynamic clk switch

src/arch/xtensa/configs/override/cannonlake_chrome.config

@@ -1,2 +1,2 @@
 CONFIG_CAVS_LPS=y
-CONFIG_CAVS_LPRO=y
+CONFIG_CAVS_USE_LPRO_IN_WAITI=y

src/arch/xtensa/configs/override/jasperlake_chrome.config

@@ -1,2 +1,2 @@
 CONFIG_CAVS_LPS=y
-CONFIG_CAVS_LPRO=y
+CONFIG_CAVS_USE_LPRO_IN_WAITI=y

src/arch/xtensa/configs/override/tigerlake_chrome.config

@@ -1,3 +1,3 @@
 CONFIG_CAVS_LPS=y
-CONFIG_CAVS_LPRO=y
 CONFIG_PROBE=y
+CONFIG_HAVE_AGENT=n

src/arch/xtensa/lib/cpu.c

@@ -32,7 +32,6 @@ extern struct core_context *core_ctx_ptr[PLATFORM_CORE_COUNT];
 extern struct xtos_core_data *core_data_ptr[PLATFORM_CORE_COUNT];
 
 static uint32_t active_cores_mask;
-static int dsp_sref[PLATFORM_CORE_COUNT];	/**< simple ref counter */
 
 #if CONFIG_NO_SLAVE_CORE_ROM
 extern void *shared_vecbase_ptr;
@@ -82,7 +81,7 @@ int arch_cpu_enable_core(int id)
 		pm_runtime_get(CORE_MEMORY_POW, id);
 
 		/* Power up slave core */
-		pm_runtime_get(PM_RUNTIME_DSP, id);
+		pm_runtime_get(PM_RUNTIME_DSP, PWRD_BY_TPLG | id);
 
 		/* allocate resources for core */
 		cpu_alloc_core_context(id);
@@ -104,7 +103,6 @@ int arch_cpu_enable_core(int id)
 
 		active_cores_mask |= (1 << id);
 	}
-	++dsp_sref[id];
 
 	return 0;
 }
@@ -114,8 +112,7 @@ void arch_cpu_disable_core(int id)
 	struct idc_msg power_down = {
 		IDC_MSG_POWER_DOWN, IDC_MSG_POWER_DOWN_EXT, id };
 
-	--dsp_sref[id];
-	if (arch_cpu_is_core_enabled(id) && dsp_sref[id] == 0) {
+	if (arch_cpu_is_core_enabled(id)) {
 		idc_send_msg(&power_down, IDC_NON_BLOCKING);
 
 		active_cores_mask ^= (1 << id);
@@ -177,7 +174,7 @@ void cpu_power_down_core(void)
 	/* Turn off stack memory for core */
 	pm_runtime_put(CORE_MEMORY_POW, cpu_get_id());
 
-	pm_runtime_put(PM_RUNTIME_DSP, cpu_get_id());
+	pm_runtime_put(PM_RUNTIME_DSP, PWRD_BY_TPLG | cpu_get_id());
 
 	/* arch_wait_for_interrupt() not used, because it will cause panic.
 	 * This code is executed on irq lvl > 0, which is expected.

src/audio/dai.c

@@ -689,12 +689,6 @@ static int dai_copy(struct comp_dev *dev)
 		src_samples = avail_bytes / get_sample_bytes(dd->frame_fmt);
 		sink_samples = audio_stream_get_free_samples(&buf->stream);
 		samples = MIN(src_samples, sink_samples);
-
-		/* limit bytes per copy to one period for the whole pipeline
-		 * in order to avoid high load spike
-		 */
-		samples = MIN(samples, dd->period_bytes /
-			      get_sample_bytes(dd->frame_fmt));
 	}
 	copy_bytes = samples * get_sample_bytes(dd->frame_fmt);
 

src/audio/detect_test.c

@@ -33,15 +33,14 @@
 #include <stdlib.h>
 
 #define ACTIVATION_DEFAULT_SHIFT 3
-#define ACTIVATION_DEFAULT_DIVIDER_S16 0.5
-#define ACTIVATION_DEFAULT_DIVIDER_S24 0.05
+#define ACTIVATION_DEFAULT_COEF 0.05
 
 #define ACTIVATION_DEFAULT_THRESHOLD_S16 \
-	((int16_t)((INT16_MAX) * (ACTIVATION_DEFAULT_DIVIDER_S16)))
+	Q_CONVERT_FLOAT(ACTIVATION_DEFAULT_COEF, 15) /* Q1.15 */
 #define ACTIVATION_DEFAULT_THRESHOLD_S24 \
-	((int32_t)((INT24_MAXVALUE) * (ACTIVATION_DEFAULT_DIVIDER_S24)))
+		Q_CONVERT_FLOAT(ACTIVATION_DEFAULT_COEF, 23) /* Q1.23 */
 #define ACTIVATION_DEFAULT_THRESHOLD_S32 \
-	ACTIVATION_DEFAULT_THRESHOLD_S24
+		Q_CONVERT_FLOAT(ACTIVATION_DEFAULT_COEF, 31) /* Q1.31 */
 
 #define INITIAL_MODEL_DATA_SIZE 64
 
@@ -384,6 +383,9 @@ static int test_keyword_params(struct comp_dev *dev,
 		cd->keyphrase_samples = KEYPHRASE_DEFAULT_PREAMBLE_LENGTH;
 	}
 
+	cd->config.activation_threshold =
+		test_keyword_get_threshold(dev, params->sample_valid_bytes * 8);
+
 	return 0;
 }
 

src/drivers/intel/hda/hda-dma.c

@@ -221,18 +221,6 @@ static void hda_dma_get_dbg_vals(struct dma_chan_data *chan,
 #define hda_dma_ptr_trace(...)
 #endif
 
-static void hda_dma_l1_entry_notify(void *arg, enum notify_id type, void *data)
-{
-	/* Notify about Host DMA usage */
-	pm_runtime_get(PM_RUNTIME_HOST_DMA_L1, 0);
-}
-
-static void hda_dma_l1_exit_notify(void *arg, enum notify_id type, void *data)
-{
-	/* Force Host DMA to exit L1 */
-	pm_runtime_put(PM_RUNTIME_HOST_DMA_L1, 0);
-}
-
 static inline int hda_dma_is_buffer_full(struct dma_chan_data *chan)
 {
 	return dma_chan_reg_read(chan, DGCS) & DGCS_BF;
@@ -293,7 +281,6 @@ static int hda_dma_wait_for_buffer_empty(struct dma_chan_data *chan)
 
 static void hda_dma_post_copy(struct dma_chan_data *chan, int bytes)
 {
-	struct hda_chan_data *hda_chan = dma_chan_get_data(chan);
 	struct dma_cb_data next = {
 		.channel = chan,
 		.elem = { .size = bytes },
@@ -309,9 +296,8 @@ static void hda_dma_post_copy(struct dma_chan_data *chan, int bytes)
 		 */
 		hda_dma_inc_fp(chan, bytes);
 
-		/* Force Host DMA to exit L1 if scheduled on DMA */
-		if (!hda_chan->irq_disabled)
-			pm_runtime_put(PM_RUNTIME_HOST_DMA_L1, 0);
+		/* Force Host DMA to exit L1 */
+		pm_runtime_put(PM_RUNTIME_HOST_DMA_L1, 0);
 	} else {
 		/*
 		 * set BFPI to let link gateway know we have read size,
@@ -336,60 +322,10 @@ static int hda_dma_link_copy_ch(struct dma_chan_data *chan, int bytes)
 	return 0;
 }
 
-static int hda_dma_host_start(struct dma_chan_data *channel)
-{
-	struct hda_chan_data *hda_chan = dma_chan_get_data(channel);
-	int ret = 0;
-
-	/* Force Host DMA to exit L1 only on start*/
-	if (!(hda_chan->state & HDA_STATE_RELEASE))
-		pm_runtime_put(PM_RUNTIME_HOST_DMA_L1, 0);
-
-	if (!hda_chan->irq_disabled)
-		return ret;
-
-	/* Inform about Host DMA usage */
-	ret = notifier_register(NULL, scheduler_get_data(SOF_SCHEDULE_LL_TIMER),
-				NOTIFIER_ID_LL_PRE_RUN, hda_dma_l1_entry_notify,
-				NOTIFIER_FLAG_AGGREGATE);
-	if (ret < 0)
-		tr_err(&hdma_tr, "hda-dmac: %d channel %d, cannot register notification %d",
-		       channel->dma->plat_data.id, channel->index,
-		       ret);
-
-	/* Register common L1 exit for all channels */
-	ret = notifier_register(NULL, scheduler_get_data(SOF_SCHEDULE_LL_TIMER),
-				NOTIFIER_ID_LL_POST_RUN, hda_dma_l1_exit_notify,
-				NOTIFIER_FLAG_AGGREGATE);
-	if (ret < 0)
-		tr_err(&hdma_tr, "hda-dmac: %d channel %d, cannot register notification %d",
-		       channel->dma->plat_data.id, channel->index,
-		       ret);
-
-	return ret;
-}
-
-static void hda_dma_host_stop(struct dma_chan_data *channel)
-{
-	struct hda_chan_data *hda_chan = dma_chan_get_data(channel);
-
-	if (!hda_chan->irq_disabled)
-		return;
-
-	/* Unregister L1 entry */
-	notifier_unregister(NULL, scheduler_get_data(SOF_SCHEDULE_LL_TIMER),
-			    NOTIFIER_ID_LL_PRE_RUN);
-
-	/* Unregister L1 exit */
-	notifier_unregister(NULL, scheduler_get_data(SOF_SCHEDULE_LL_TIMER),
-			    NOTIFIER_ID_LL_POST_RUN);
-}
-
 /* lock should be held by caller */
 static int hda_dma_enable_unlock(struct dma_chan_data *channel)
 {
 	struct hda_chan_data *hda_chan;
-	int ret;
 
 	tr_info(&hdma_tr, "hda-dmac: %d channel %d -> enable",
 		channel->dma->plat_data.id, channel->index);
@@ -404,14 +340,6 @@ static int hda_dma_enable_unlock(struct dma_chan_data *channel)
 	hda_chan = dma_chan_get_data(channel);
 	hda_chan->desc_avail = channel->desc_count;
 
-	if (channel->direction == DMA_DIR_HMEM_TO_LMEM ||
-	    channel->direction == DMA_DIR_LMEM_TO_HMEM) {
-		pm_runtime_get(PM_RUNTIME_HOST_DMA_L1, 0);
-		ret = hda_dma_host_start(channel);
-		if (ret < 0)
-			return ret;
-	}
-
 	/* start link output transfer now */
 	if (channel->direction == DMA_DIR_MEM_TO_DEV &&
 	    !(hda_chan->state & HDA_STATE_RELEASE))
@@ -436,7 +364,6 @@ static int hda_dma_link_copy(struct dma_chan_data *channel, int bytes,
 static int hda_dma_host_copy(struct dma_chan_data *channel, int bytes,
 			     uint32_t flags)
 {
-	struct hda_chan_data *hda_chan = dma_chan_get_data(channel);
 	int ret;
 
 	tr_dbg(&hdma_tr, "hda-dmac: %d channel %d -> copy 0x%x bytes",
@@ -445,8 +372,7 @@ static int hda_dma_host_copy(struct dma_chan_data *channel, int bytes,
 	hda_dma_get_dbg_vals(channel, HDA_DBG_PRE, HDA_DBG_HOST);
 
 	/* Register Host DMA usage */
-	if (!hda_chan->irq_disabled)
-		pm_runtime_get(PM_RUNTIME_HOST_DMA_L1, 0);
+	pm_runtime_get(PM_RUNTIME_HOST_DMA_L1, 0);
 
 	/* blocking mode copy */
 	if (flags & DMA_COPY_BLOCKING) {
@@ -580,10 +506,6 @@ static int hda_dma_release(struct dma_chan_data *channel)
 	 */
 	hda_chan->state |= HDA_STATE_RELEASE;
 
-	if (channel->direction == DMA_DIR_HMEM_TO_LMEM ||
-	    channel->direction == DMA_DIR_LMEM_TO_HMEM)
-		ret = hda_dma_host_start(channel);
-
 	irq_local_enable(flags);
 	return ret;
 }
@@ -622,10 +544,6 @@ static int hda_dma_stop(struct dma_chan_data *channel)
 	tr_info(&hdma_tr, "hda-dmac: %d channel %d -> stop",
 		channel->dma->plat_data.id, channel->index);
 
-	if (channel->direction == DMA_DIR_HMEM_TO_LMEM ||
-	    channel->direction == DMA_DIR_LMEM_TO_HMEM)
-		hda_dma_host_stop(channel);
-
 	/* disable the channel */
 	dma_chan_reg_update_bits(channel, DGCS, DGCS_GEN | DGCS_FIFORDY, 0);
 	channel->status = COMP_STATE_PREPARE;

src/lib/agent.c

@@ -66,7 +66,7 @@ static enum task_state validate(void *data)
 	/* warning timeout */
 	if (delta > sa->warn_timeout)
 		tr_warn(&sa_tr, "validate(), ll drift detected, delta = %u",
-			delta);
+			(uint32_t)delta);
 
 	/* update last_check to current */
 	sa->last_check = current;

src/platform/Kconfig

@@ -296,17 +296,9 @@ config CAVS_LPS
 	  This option is required to support S0ix/D0ix mode
 	  on cAVS platforms.
 
-config CAVS_LPRO
-	bool "Enable low power ring oscillator as the default clock"
-	default n
-	depends on CAVS && !CAVS_VERSION_1_5
-	help
-	  Select if you want to use 120MHz LPRO as the DSP clock source.
-	  This option is required to support S0ix/D0ix mode.
-
 config CAVS_USE_LPRO_IN_WAITI
 	bool
-	default n
+	default y
 	depends on CAVS
 	select WAKEUP_HOOK
 	help

src/platform/cannonlake/include/platform/lib/clk.h

@@ -20,11 +20,7 @@
 
 #define CPU_HPRO_FREQ_IDX 1
 
-#if CONFIG_CAVS_LPRO
-#define CPU_DEFAULT_IDX CPU_LPRO_FREQ_IDX
-#else
 #define CPU_DEFAULT_IDX CPU_HPRO_FREQ_IDX
-#endif
 
 #define SSP_DEFAULT_IDX	0
 

src/platform/intel/cavs/include/cavs/lib/clk.h

@@ -43,11 +43,15 @@ extern const uint32_t cpu_freq_status_mask[];
 
 void platform_clock_init(struct sof *sof);
 
+void platform_clock_waiti_entry(void);
+void platform_clock_waiti_exit(void);
+
 #if CONFIG_CAVS_USE_LPRO_IN_WAITI
-void platform_clock_on_waiti(void);
 void platform_clock_on_wakeup(void);
 #endif
 
+void platform_set_active_clock(int index);
+
 #endif /* __CAVS_LIB_CLK_H__ */
 
 #else

src/platform/intel/cavs/include/cavs/lib/pm_runtime.h

@@ -16,12 +16,21 @@
 #ifndef __CAVS_LIB_PM_RUNTIME_H__
 #define __CAVS_LIB_PM_RUNTIME_H__
 
+/**
+ * \brief extra pwr flag to power up a core with a specific reason
+ * it can be powered down only with the same reason (flag)
+ */
+#define PWRD_MASK	MASK(31, 30)
+#define PWRD_BY_HPRO	BIT(31)		/**< requested by HPRO */
+#define PWRD_BY_TPLG	BIT(30)		/**< typical power up */
+
 struct pm_runtime_data;
 
 /** \brief cAVS specific runtime power management data. */
 struct cavs_pm_runtime_data {
 	int dsp_d0_sref; /**< simple ref counter, accessed by core 0 only */
 	int host_dma_l1_sref; /**< ref counter for Host DMA accesses */
+	int dsp_client_bitmap[PLATFORM_CORE_COUNT]; /**< simple pwr override */
 };
 
 #endif