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topology: add macro to support multiple fir iir eq filters #2660

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Merged
lgirdwood merged 2 commits into from
Apr 7, 2020
Merged

topology: add macro to support multiple fir iir eq filters #2660

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697f5bc
topology: add macro to support eq filters for sof-cml-rt5682
fredoh9 Apr 2, 2020
da9050b
topology: set DMIC pipe with eq-iir with 40 Hz highpass
fredoh9 Apr 3, 2020
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15 changes: 9 additions & 6 deletions tools/topology/CMakeLists.txt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -26,8 +26,8 @@ set(TPLGS
"sof-hda-generic\;sof-hda-generic\;-DCHANNELS=0\;-DPPROC=volume"
"sof-hda-generic\;sof-hda-generic-2ch\;-DCHANNELS=2\;-DPPROC=volume"
"sof-hda-generic\;sof-hda-generic-4ch\;-DCHANNELS=4\;-DPPROC=volume"
"sof-hda-generic\;sof-hda-generic-eq-2ch\;-DCHANNELS=2\;-DPPROC=eq-volume"
"sof-hda-generic\;sof-hda-generic-eq-4ch\;-DCHANNELS=4\;-DPPROC=eq-volume"
"sof-hda-generic\;sof-hda-generic-eq-2ch\;-DCHANNELS=2\;-DPPROC=eq-iir-eq-fir-volume"
"sof-hda-generic\;sof-hda-generic-eq-4ch\;-DCHANNELS=4\;-DPPROC=eq-iir-eq-fir-volume"
"sof-hda-generic-kwd\;sof-hda-generic-2ch-kwd\;-DCHANNELS=2"
"sof-hda-generic-kwd\;sof-hda-generic-4ch-kwd\;-DCHANNELS=4"
"sof-hda-generic-idisp\;sof-hda-generic-idisp\;-DCHANNELS=0"
Expand Down Expand Up @@ -72,11 +72,11 @@ set(TPLGS
"sof-apl-da7219\;sof-apl-da7219"
"sof-glk-da7219-kwd\;sof-glk-da7219-kwd"
"sof-glk-da7219\;sof-glk-da7219"
"sof-glk-da7219\;sof-glk-eq-da7219\;-DDMICPROC=eq"
"sof-glk-da7219\;sof-glk-eq-da7219\;-DDMICPROC=eq-iir-volume"
"sof-glk-rt5682\;sof-glk-rt5682"
"sof-icl-nocodec\;sof-icl-nocodec"
"sof-apl-pcm512x-nohdmi\;sof-apl-eq-pcm512x\;-DPPROC=eq-volume"
"sof-apl-dmic\;sof-apl-eq-dmic\;-DCHANNELS=4\;-DCPROC=eq"
"sof-apl-pcm512x-nohdmi\;sof-apl-eq-pcm512x\;-DPPROC=eq-iir-eq-fir-volume"
"sof-apl-dmic\;sof-apl-eq-dmic\;-DCHANNELS=4\;-DCPROC=eq-iir-volume"
"sof-apl-src-dmic\;sof-apl-src-dmic"
"sof-apl-dmic-a2ch\;sof-apl-dmic-a2ch"
"sof-apl-dmic-b2ch\;sof-apl-dmic-b2ch"
Expand All @@ -98,6 +98,9 @@ set(TPLGS
"sof-apl-asrc-pcm512x\;sof-apl-asrc-pcm512x"
"sof-apl-src-pcm512x\;sof-apl-src-pcm512x"
"sof-cml-rt5682\;sof-cml-rt5682\;-DPLATFORM=cml"
"sof-cml-rt5682\;sof-cml-eq-fir-rt5682\;-DPLATFORM=cml\;-DHSMICPROC=eq-fir-volume"
"sof-cml-rt5682\;sof-cml-eq-fir-loud-rt5682\;-DPLATFORM=cml\;-DHSEARPROC=eq-iir-volume\;-DPIPELINE_FILTER1=eq_iir_coef_loudness.m4\;-DHSMICPROC=eq-fir-volume\;-DPIPELINE_FILTER2=eq_fir_coef_loudness.m4"
"sof-cml-rt5682\;sof-cml-eq-iir-rt5682\;-DPLATFORM=cml\;-DHSEARPROC=eq-iir-volume"
Comment thread
fredoh9 marked this conversation as resolved.
Resolved
"sof-cml-rt5682\;sof-whl-rt5682\;-DPLATFORM=whl"
"sof-cml-rt5682\;sof-icl-rt5682\;-DPLATFORM=icl"
"sof-cml-rt5682-kwd\;sof-cml-rt5682-kwd\;-DPLATFORM=cml"
Expand All @@ -110,7 +113,7 @@ set(TPLGS
"sof-cml-rt5682-max98357a\;sof-cml-rt5682-max98357a\;-DPLATFORM=cml"
"sof-cml-demux-rt5682-max98357a\;sof-cml-demux-rt5682-max98357a\;-DPLATFORM=cml"
"sof-cml-rt1011-rt5682\;sof-cml-rt1011-rt5682\;-DPLATFORM=cml\;-DPPROC=volume"
"sof-cml-rt1011-rt5682\;sof-cml-eq-rt1011-rt5682\;-DPLATFORM=cml\;-DPPROC=eq-volume"
"sof-cml-rt1011-rt5682\;sof-cml-eq-rt1011-rt5682\;-DPLATFORM=cml\;-DPPROC=eq-iir-eq-fir-volume"
"sof-tgl-nocodec\;sof-tgl-nocodec"
"sof-tgl-rt711-i2s-rt1308\;sof-tgl-rt711-i2s-rt1308\;-DHDMI=1"
"sof-tgl-rt711-i2s-rt1308\;sof-tgl-rt711-i2s-rt1308-nohdmi"
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_fir_coef_flat.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# Flat FIR EQ 19-Dec-2018
CONTROLBYTES_PRIV(EQFIR_priv,
CONTROLBYTES_PRIV(DEF_EQFIR_PRIV,
Comment thread
fredoh9 marked this conversation as resolved.
Resolved
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_flat.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# Flat IIR EQ 18-Dec-2018
CONTROLBYTES_PRIV(EQIIR_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
Comment thread
fredoh9 marked this conversation as resolved.
Resolved
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_20hz_0db_16khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 20 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP20HZ0dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_20hz_0db_48khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 20 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP20HZ0dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_20hz_20db_16khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 20 Hz second order high-pass, gain 20 dB, created with example_iir_eq.m 30-Mar-2020
CONTROLBYTES_PRIV(EQIIR_HP20HZ20dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xe0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_20hz_20db_48khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 20 Hz second order high-pass, gain 20 dB, created with example_iir_eq.m 30-Mar-2020
CONTROLBYTES_PRIV(EQIIR_HP20HZ20dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xe0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_30hz_0db_16khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 30 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP30HZ0dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_30hz_0db_48khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 30 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP30HZ0dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_30hz_20db_16khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 30 Hz second order high-pass, gain 20 dB, created with example_iir_eq.m 30-Mar-2020
CONTROLBYTES_PRIV(EQIIR_HP30HZ20dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xe0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_30hz_20db_48khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 30 Hz second order high-pass, gain 20 dB, created with example_iir_eq.m 30-Mar-2020
CONTROLBYTES_PRIV(EQIIR_HP30HZ20dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xe0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_40hz_0db_16khz.m4
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Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 40 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP40HZ0dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_40hz_0db_48khz.m4
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Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 40 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP40HZ0dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_40hz_20db_16khz.m4
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Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 40 Hz second order high-pass, gain 20 dB, created with example_iir_eq.m 30-Mar-2020
CONTROLBYTES_PRIV(EQIIR_HP40HZ20dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xe0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_40hz_20db_48khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 40 Hz second order high-pass, gain 20 dB, created with example_iir_eq.m 30-Mar-2020
CONTROLBYTES_PRIV(EQIIR_HP40HZ20dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xe0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_50hz_0db_16khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 50 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP50HZ0dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_50hz_0db_48khz.m4
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Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 50 Hz second order high-pass, gain 0 dB, created with example_iir_eq.m 27-Nov-2019
CONTROLBYTES_PRIV(EQIIR_HP50HZ0dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0xc0,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_50hz_20db_16khz.m4
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 50 Hz second order high-pass and +20 dB gain 13-Aug-2019
CONTROLBYTES_PRIV(EQIIR_HP50HZ20dB16K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
2 changes: 1 addition & 1 deletion tools/topology/m4/eq_iir_coef_highpass_50hz_20db_48khz.m4
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Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# 50 Hz second order high-pass and +20 dB gain 18-Dec-2018
CONTROLBYTES_PRIV(EQIIR_HP50HZ20dB48K_priv,
CONTROLBYTES_PRIV(DEF_EQIIR_PRIV,
` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
` 0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x03,'
` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
Expand Down
4 changes: 2 additions & 2 deletions tools/topology/platform/intel/intel-generic-dmic.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -21,14 +21,14 @@ dnl time_domain, sched_comp)
# Passthrough capture pipeline using max channels defined by CHANNELS.

# Set 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-capture.m4,
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture.m4,
DMIC_PIPELINE_48k_ID, DMIC_DAI_LINK_48k_ID, CHANNELS, s32le,
1000, 0, 0, 48000, 48000, 48000)

# Passthrough capture pipeline using max channels defined by CHANNELS.

# Schedule with 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-capture-16khz.m4,
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture-16khz.m4,
DMIC_PIPELINE_16k_ID, DMIC_DAI_LINK_16k_ID, CHANNELS, s32le,
1000, 0, 0, 16000, 16000, 16000)

Expand Down
4 changes: 2 additions & 2 deletions tools/topology/sof-apl-pcm512x.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -75,14 +75,14 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,

# DMIC passthrough capture pipeline 7 on PCM 4 using max 2 channels.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-capture.m4,
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture.m4,
7, 5, 4, s32le,
1000, 0, 0,
48000, 48000, 48000)

# DMIC16kHz passthrough capture pipeline 8 on PCM 5 using max 2 channels.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-capture-16khz.m4,
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture-16khz.m4,
8, 6, 2, s16le,
1000, 0, 0,
16000, 16000, 16000)
Expand Down
21 changes: 14 additions & 7 deletions tools/topology/sof-cml-rt5682.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -19,15 +19,22 @@ include(`platform/intel/'PLATFORM`.m4')

DEBUG_START

# if XPROC is not defined, define with default pipe
ifdef(`HSMICPROC', , `define(HSMICPROC, volume)')
ifdef(`HSEARPROC', , `define(HSEARPROC, volume)')
ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')

#
# Define the pipelines
#
# PCM0 <---> volume <----> SSP(SSP_INDEX, BE link 0)
# PCM1 <------------------ DMIC01 (dmic0 capture, , BE link 1)
`# PCM0 ---> 'HSEARPROC` ----> SSP(SSP_INDEX, BE link 0)'
`# PCM0 <--- 'HSMICPROC` <---- SSP(SSP_INDEX, BE link 0)'
`# PCM1 <--- 'DMICPROC` <----- DMIC01 (dmic0 capture, , BE link 1)'
# PCM2 ----> volume -----> iDisp1 (HDMI/DP playback, BE link 3)
# PCM3 ----> volume -----> iDisp2 (HDMI/DP playback, BE link 4)
# PCM4 ----> volume -----> iDisp3 (HDMI/DP playback, BE link 5)
# PCM8 <---- volume <----- DMIC16k (dmic16k, BE link 2)
`# PCM8 <---- 'DMIC16KPROC` <----- DMIC16k (dmic16k, BE link 2)'
#

dnl PIPELINE_PCM_ADD(pipeline,
Expand All @@ -38,21 +45,21 @@ dnl time_domain, sched_comp)

# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
PIPELINE_PCM_ADD(sof/pipe-`HSEARPROC'-playback.m4,
1, 0, 2, s24le,
1000, 0, 0,
48000, 48000, 48000)

# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
PIPELINE_PCM_ADD(sof/pipe-`HSMICPROC'-capture.m4,
2, 0, 2, s24le,
1000, 0, 0,
48000, 48000, 48000)

# Passthrough capture pipeline 3 on PCM 1 using max 4 channels.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
PIPELINE_PCM_ADD(sof/pipe-`DMICPROC'-capture.m4,
3, 1, 4, s32le,
1000, 0, 0,
48000, 48000, 48000)
Expand Down Expand Up @@ -80,7 +87,7 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,

# Passthrough capture pipeline 7 on PCM 5 using max 2 channels.
# Schedule 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4,
PIPELINE_PCM_ADD(sof/pipe-`DMIC16KPROC'-capture-16khz.m4,
8, 8, 2, s24le,
1000, 0, 0,
16000, 16000, 16000)
Expand Down
14 changes: 10 additions & 4 deletions tools/topology/sof/pipe-eq-fir-capture.m4
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,12 @@ include(`eq_fir.m4')
# Controls
#

# Use flat response
include(`eq_fir_coef_flat.m4')
define(DEF_EQFIR_COEF, concat(`eqfir_coef_', PIPELINE_ID))
define(DEF_EQFIR_PRIV, concat(`eqfir_priv_', PIPELINE_ID))

# define filter. eq_fir_coef_pass.m4 is set by default
ifdef(`PIPELINE_FILTER2', , `define(PIPELINE_FILTER2, eq_fir_coef_pass.m4)')
include(PIPELINE_FILTER2)

# EQ Bytes control with max value of 255
define(MY_CONTROLBYTES, concat(`EQFIR_CONTROLBYTES_', PIPELINE_ID))
Expand All @@ -32,7 +36,7 @@ C_CONTROLBYTES(MY_CONTROLBYTES, PIPELINE_ID,
, , ,
CONTROLBYTES_MAX(, 4096),
,
EQFIR_priv)
DEF_EQFIR_PRIV)

#
# Components and Buffers
Expand All @@ -50,7 +54,7 @@ W_BUFFER(0, COMP_BUFFER_SIZE(2,
COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS,
COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP)

W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS,
W_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS,
COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS,
COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP)

Expand Down Expand Up @@ -80,3 +84,5 @@ PCM_CAPABILITIES(EQ FIR Capture PCM_ID, `S32_LE,S24_LE,S16_LE', PCM_MIN_RATE,
2, 16, 192, 16384, 65536, 65536)

undefine(`MY_CONTROLBYTES')
undefine(`MY_EQFIR_COEF')
undefine(`MY_EQFIR_PRIV')
12 changes: 9 additions & 3 deletions tools/topology/sof/pipe-eq-fir-playback.m4
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,12 @@ include(`eq_fir.m4')
# Controls
#

# Use coefficients for flat frequency response
include(`eq_fir_coef_flat.m4')
define(DEF_EQFIR_COEF, concat(`eqfir_coef_', PIPELINE_ID))
define(DEF_EQFIR_PRIV, concat(`eqfir_priv_', PIPELINE_ID))

# define filter. eq_fir_coef_pass.m4 is set by default
ifdef(`PIPELINE_FILTER2', , `define(PIPELINE_FILTER2, eq_fir_coef_pass.m4)')
include(PIPELINE_FILTER2)

# EQ Bytes control with max value of 255
define(MY_CONTROLBYTES, concat(`EQFIR_CONTROLBYTES_', PIPELINE_ID))
Expand All @@ -30,7 +34,7 @@ C_CONTROLBYTES(MY_CONTROLBYTES, PIPELINE_ID,
, , ,
CONTROLBYTES_MAX(, 4096),
,
EQFIR_priv)
DEF_EQFIR_PRIV)

#
# Components and Buffers
Expand Down Expand Up @@ -80,3 +84,5 @@ PCM_CAPABILITIES(EQ FIR Playback PCM_ID, `S32_LE,S24_LE,S16_LE',
2, 16, 192, 16384, 65536, 65536)

undefine(`MY_CONTROLBYTES')
undefine(`MY_EQFIR_COEF')
undefine(`MY_EQFIR_PRIV')
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