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topology: cavs: switch all pipelines to timer scheduling - #1946

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tlauda merged 1 commit into
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tlauda:topic/cavs-timer-scheduling
Oct 16, 2019
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tlauda merged 1 commit into
thesofproject:masterfrom
tlauda:topic/cavs-timer-scheduling

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@tlauda

@tlauda tlauda commented Oct 15, 2019

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Switches all pipelines for cAVS platforms to timer scheduling.

Signed-off-by: Tomasz Lauda tomasz.lauda@linux.intel.com

@jajanusz

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Switches all pipelines for cAVS platforms to timer scheduling. why?

@tlauda

tlauda commented Oct 16, 2019 •

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Switches all pipelines for cAVS platforms to timer scheduling. why?

To limit the number of interrupt levels processed in the system. Timer + IPC + IDC are already on level 2, DMAs are on level 5. DMIC and SSP will be the only one left on level 5, but they are raised only when hardware detects an over/underrun, so almost never. Will update the commit description.

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Switches all pipelines for cAVS platforms to timer scheduling. why?

To limit the number of interrupt levels processed in the system. Timer + IPC + IDC are already on level 2, DMAs are on level 5. DMIC and SSP will be the only one left on level 5, but they are raised only when hardware detects an over/underrung, so almost never.

Thanks 4 info

Switches all pipelines for cAVS platforms to timer scheduling.
This way we limit the number of interrupt levels processed
in the system. Timer, IPC and IDC are already on level 2 and
DMAs are on level 5.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
@tlauda
tlauda force-pushed the topic/cavs-timer-scheduling branch from 871c84e to 4e0113d Compare October 16, 2019 09:32
@tlauda
tlauda merged commit 6fa4e4c into thesofproject:master Oct 16, 2019
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tlauda deleted the topic/cavs-timer-scheduling branch November 22, 2019 11:22
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3 participants