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@singalsu 100% reproducible so should be easy to find.
I can confirm that I also found this issue.
Tried to add ASRC components in an imx pipeline who looked like: PCM0 <----> ASRC <----> volume <-----> SAI1 (wm8960).
When trying to playback a wav, even with 48kHz it crashes in SOF, I only get the IPC reply in kernel
(sof-audio-of 556e8000.dsp: error: hw params ipc failed for stream 0) and no logs in sof-logger.
This avoid the panic but the pipeline no more works (with SSP DAI and setting up timestamp for SSP uses this information). I wonder if dd->chan has got deprecated.
@lgirdwood Do you remember if this has been changed?
Edit: Seems like dai_config_prepare() sets it. Maybe ASRC prepare happens before DAI has been prepared. Maybe ASRC should set up timestamps in first copy instead.
Edit 2: A fix where ASRC sets up timestamping in trigger start seems to work. Testing...
@singalsu any asynchronous APIs should not assume a previous state. In this case the DAI API assumes that the timestamp is setup by prepare(). The DAI API needs to make this clear (where the timestamp and other async features APIs are ready) and survive any attempts to use the API prior to setup. i.e. we check for NULL
@singalsu I've tested i.MX topology with ASRC, with your patches (#4095), and I don't get the DSP panic, anymore.
But I still have some questions regarding ASRC.
It seems to me that I can only convert from 8000 11025 16000 22050 32000 44100 48000 to 48000 Hz.
If I try a downsampling from 64000 to 48000 I get:
But, I'm wondering why do you, in Intel's topologies, like sof-apl-asrc-pcm512x.m4 use 192000 Hz as max rate - see here .
Is this really converted to 48000 Hz? If yes, how?
@iuliana-prodan Nice that it fixes the issue for you. There's a minor document add need for that patch and then it should be good to go.
PCM512x codec usually is slave to APL so we can use the sychronous SRC to convert from 192 to 48 kHz. If the codec is master the topology could use SRC and ASRC both in same pipeline. Though this could reveal new pipeline rules issues. This is actually a good case to add to our rules study we are doing with @juimonen . With current quality ASRC coefficients the result could be better with such SRC-ASRC system because the ASRC aliases more. ASRC alone might also be higher load.
@lgirdwood I updated the PR, hope the doxygen part add is OK.
@iuliana-prodan@kkarask There's another problem that I noticed with the I2S devel topology that my other related PR adds. The simultaneous playback and capture with ASRC pipelines into same DAI causes and I/O error for one direction with xrun recover failed error in trace. I'll add a new issue to track the add of the access filtering code to HW timestamps.
PCM512x codec usually is slave to APL so we can use the sychronous SRC to convert from 192 to 48 kHz. If the codec is master the topology could use SRC and ASRC both in same pipeline. Though this could reveal new pipeline rules issues. This is actually a good case to add to our rules study we are doing with @juimonen . With current quality ASRC coefficients the result could be better with such SRC-ASRC system because the ASRC aliases more. ASRC alone might also be higher load.
So, for APL, for example, you use ASRC for upsampling and SRC for downsampling?
For imx8QM we use wm8960 codec as master.
You're saying that we can use SRC and ASRC in the same pipeline, something like:
PCM0 <----> SRC <----> ASRC <---->volume <-----> SAI1 (wm8960)?
@iuliana-prodan The history of ASRC is different than SRC. This was a contribution from other team than Liam's and we got permission to publish source code (I did the "SOFifying" work) but not the document that wasn't totally suitable for this need. A from scratch written new document should be possible given some time. Add an enhancement issue for SOF Docs perhaps?
If there's need for large rate changes, SRC should be better for the hard work. I assume the shipped rates conversions are where the ASRC algorithm performs well. I didn't change those from original. Also some of the Q-format choices inside may to restrict the highest rates or highest in/out ratios so those would need to be checked. For now the SRC-ASRC combination is the recommendation to cover all rates. Load and latency of SRC is low when it does simple 1/N or N fractions. But there will be likely new pipeline params walk issues when SRC and ASRC are used both. Need to test and file issues.
@singalsu@lgirdwood@zrombel I'm looking on Intel's topologies with SRC and ASRC and on the CI (here, for example).
Where can I find the tests for:
11_01_TestSrcSimple16000On48000Hz16b16b2ch or 17_06_TestMultiCoreCompSrcPlb48000Hz24b32b4ch?
I can only see the logs from the CI.
How/where can I find out the topology used, the test itself?
@iuliana-prodan Those test case implementations are not open source. They use the diagnostic driver (open source under SOF) and I think they are not based on any .tplg but some generated IPC sequence. It would be useful to have ASRC tests in sof-test as well to test via normal topologies and driver too.
Activity
[-][BUG] DSP panic problem[/-][+][BUG] DSP panic problem in ASRC component [/+]lgirdwood commentedon Apr 21, 2021
@singalsu 100% reproducible so should be easy to find.
iuliana-prodan commentedon Apr 21, 2021
I can confirm that I also found this issue.
Tried to add ASRC components in an imx pipeline who looked like: PCM0 <----> ASRC <----> volume <-----> SAI1 (wm8960).
When trying to playback a wav, even with 48kHz it crashes in SOF, I only get the IPC reply in kernel
(
sof-audio-of 556e8000.dsp: error: hw params ipc failed for stream 0) and no logs in sof-logger.singalsu commentedon Apr 22, 2021
Thanks for reporting this! I will start checking tomorrow.
singalsu commentedon Apr 23, 2021
Yep, confirm the panic happens with normal SOF linux driver controlled device, no need to set up diagnostic driver that eases the debugging for me.
Edit: The stack dump shows it happens at dai_ts_config(). I'll find out more next week.
singalsu commentedon Apr 26, 2021
This avoid the panic but the pipeline no more works (with SSP DAI and setting up timestamp for SSP uses this information). I wonder if dd->chan has got deprecated.
@lgirdwood Do you remember if this has been changed?
Edit: Seems like dai_config_prepare() sets it. Maybe ASRC prepare happens before DAI has been prepared. Maybe ASRC should set up timestamps in first copy instead.
Edit 2: A fix where ASRC sets up timestamping in trigger start seems to work. Testing...
lgirdwood commentedon Apr 26, 2021
@singalsu any asynchronous APIs should not assume a previous state. In this case the DAI API assumes that the timestamp is setup by prepare(). The DAI API needs to make this clear (where the timestamp and other async features APIs are ready) and survive any attempts to use the API prior to setup. i.e. we check for NULL
iuliana-prodan commentedon Apr 27, 2021
@singalsu I've tested i.MX topology with ASRC, with your patches (#4095), and I don't get the DSP panic, anymore.
But I still have some questions regarding ASRC.
It seems to me that I can only convert from 8000 11025 16000 22050 32000 44100 48000 to 48000 Hz.
If I try a downsampling from 64000 to 48000 I get:
Which seems expected, by looking in
asrc_farrow.c, ininitialise_filter()and theasrc_conversion_ratiosBut, I'm wondering why do you, in Intel's topologies, like sof-apl-asrc-pcm512x.m4 use 192000 Hz as max rate - see here .
Is this really converted to 48000 Hz? If yes, how?
Thanks!
singalsu commentedon Apr 28, 2021
@iuliana-prodan Nice that it fixes the issue for you. There's a minor document add need for that patch and then it should be good to go.
PCM512x codec usually is slave to APL so we can use the sychronous SRC to convert from 192 to 48 kHz. If the codec is master the topology could use SRC and ASRC both in same pipeline. Though this could reveal new pipeline rules issues. This is actually a good case to add to our rules study we are doing with @juimonen . With current quality ASRC coefficients the result could be better with such SRC-ASRC system because the ASRC aliases more. ASRC alone might also be higher load.
lgirdwood commentedon Apr 28, 2021
@singalsu ping - will we see the fix be ready to merge today ?
Audio: ASRC: Move DAI timestamping setup request to trigger start
singalsu commentedon Apr 28, 2021
@lgirdwood I updated the PR, hope the doxygen part add is OK.
@iuliana-prodan @kkarask There's another problem that I noticed with the I2S devel topology that my other related PR adds. The simultaneous playback and capture with ASRC pipelines into same DAI causes and I/O error for one direction with xrun recover failed error in trace. I'll add a new issue to track the add of the access filtering code to HW timestamps.
iuliana-prodan commentedon Apr 28, 2021
Is there a document about ASRC? Where?
I only know about SRC - https://thesofproject.github.io/latest/algos/src/sample_rate_conversion.html
So, for APL, for example, you use ASRC for upsampling and SRC for downsampling?
For imx8QM we use wm8960 codec as master.
You're saying that we can use SRC and ASRC in the same pipeline, something like:
PCM0 <----> SRC <----> ASRC <---->volume <-----> SAI1 (wm8960)?
singalsu commentedon Apr 28, 2021
@iuliana-prodan The history of ASRC is different than SRC. This was a contribution from other team than Liam's and we got permission to publish source code (I did the "SOFifying" work) but not the document that wasn't totally suitable for this need. A from scratch written new document should be possible given some time. Add an enhancement issue for SOF Docs perhaps?
If there's need for large rate changes, SRC should be better for the hard work. I assume the shipped rates conversions are where the ASRC algorithm performs well. I didn't change those from original. Also some of the Q-format choices inside may to restrict the highest rates or highest in/out ratios so those would need to be checked. For now the SRC-ASRC combination is the recommendation to cover all rates. Load and latency of SRC is low when it does simple 1/N or N fractions. But there will be likely new pipeline params walk issues when SRC and ASRC are used both. Need to test and file issues.
iuliana-prodan commentedon Apr 28, 2021
@singalsu @lgirdwood @zrombel I'm looking on Intel's topologies with SRC and ASRC and on the CI (here, for example).
Where can I find the tests for:
11_01_TestSrcSimple16000On48000Hz16b16b2ch or 17_06_TestMultiCoreCompSrcPlb48000Hz24b32b4ch?
I can only see the logs from the CI.
How/where can I find out the topology used, the test itself?
Thanks!
singalsu commentedon Apr 30, 2021
@iuliana-prodan Those test case implementations are not open source. They use the diagnostic driver (open source under SOF) and I think they are not based on any .tplg but some generated IPC sequence. It would be useful to have ASRC tests in sof-test as well to test via normal topologies and driver too.