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ASoC: SOF: Intel: hda: call codec wake at chip init - #1932
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The misc clock gating (MISCBDCGE) is disabled for controller reset and reenabled once reset is complete. Fix the case when error happens during reset, and clock gating is left disabled. The clock gating should be reenabled also in this case. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Further align HDA init sequence to the legacy non-DSP HDA driver by calling snd_hdac_set_codec_wakeup() during the chip init sequence. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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This was referenced Mar 30, 2020
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Further align HDA init sequence to the legacy non-DSP HDA driver by
calling snd_hdac_set_codec_wakeup() during the chip init sequence.
One part of fix needed for #1847 (other part is a i915 driver change)