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FROMLIST: drm/msm/dsi: fix AHB clock staying enabled across suspend - #1240
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Salendarsingh Gaud (sgaud-quic) merged 1 commit intoOct 9, 2026
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pm_clk_suspend()/resume() only call clk_disable()/clk_enable() for the
AHB ("iface") clock, never clk_unprepare(), so prepare_count never
reaches 0. The clock (and its source) stays reported as enabled
through s2idle suspend even though the display stack is fully
suspended:
disp_cc_mdss_ahb_clk [19200000] ->
disp_cc_mdss_ahb_clk_src [19200000] ->
bi_tcxo [19200000] -> xo-board [76800000]
disp_cc_mdss_ahb_clk_src [19200000] ->
bi_tcxo [19200000] -> xo-board [76800000]
Calling clk_prepare_enable()/clk_disable_unprepare() directly from the
PHY's runtime_suspend/runtime_resume is not safe either, since it can
deadlock against the PHY's own PLL clocks taking the global CCF
prepare_lock during clk_prepare()/clk_unprepare().
Fix this by moving clk_prepare()/clk_unprepare() out of the runtime PM
path. clk_enable()/clk_disable() (spinlock only) stay in
runtime_suspend/runtime_resume. clk_prepare()/clk_unprepare() move to
suspend_late/resume_early, avoiding the prepare_lock collision and
actually dropping prepare_count to 0. DPM_FLAG_NO_DIRECT_COMPLETE
ensures these hooks always run on sleep.
Fixes: 0b3ccb7 ("drm/msm/dsi: Fix 14nm DSI PHY PLL Lock issue")
Link: https://lore.kernel.org/all/20261006-dsi-ahb-clk-suspend-fix-v1-1-67da848e1b0a@oss.qualcomm.com/
Signed-off-by: Arpit Saini <arpit.saini@oss.qualcomm.com>
arpit-dev-geek
requested review from
a team,
aiquny,
Nicolas Dechesne (ndechesne) and
Shiraz Hashim (shashim-quic)
October 6, 2026 14:06
|
Merge Check Failed: CR Not Eligible for Merge CR 4678448 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
Shiraz Hashim (shashim-quic)
approved these changes
Oct 8, 2026
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Salendarsingh Gaud (sgaud-quic)
merged commit Oct 9, 2026
cf97ee8
into
qualcomm-linux:qcom-6.18.y
8 of 9 checks passed
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pm_clk_suspend()/resume() only call clk_disable()/clk_enable() for the AHB ("iface") clock, never clk_unprepare(), so prepare_count never reaches 0. The clock (and its source) stays reported as enabled through s2idle suspend even though the display stack is fully suspended:
disp_cc_mdss_ahb_clk [19200000] ->
disp_cc_mdss_ahb_clk_src [19200000] ->
bi_tcxo [19200000] -> xo-board [76800000]
disp_cc_mdss_ahb_clk_src [19200000] ->
bi_tcxo [19200000] -> xo-board [76800000]
Calling clk_prepare_enable()/clk_disable_unprepare() directly from the PHY's runtime_suspend/runtime_resume is not safe either, since it can deadlock against the PHY's own PLL clocks taking the global CCF prepare_lock during clk_prepare()/clk_unprepare().
Fix this by moving clk_prepare()/clk_unprepare() out of the runtime PM path. clk_enable()/clk_disable() (spinlock only) stay in runtime_suspend/runtime_resume. clk_prepare()/clk_unprepare() move to suspend_late/resume_early, avoiding the prepare_lock collision and actually dropping prepare_count to 0. DPM_FLAG_NO_DIRECT_COMPLETE ensures these hooks always run on sleep.
Fixes: 0b3ccb7 ("drm/msm/dsi: Fix 14nm DSI PHY PLL Lock issue")
Link: https://lore.kernel.org/all/20261006-dsi-ahb-clk-suspend-fix-v1-1-67da848e1b0a@oss.qualcomm.com/
CRs-Fixed: 4678448
qcom-next PR: qualcomm-linux/kernel-topics#1972