Skip to content

security: audit entry for the riscv64 float32 GEMM kernel - #109

Merged
tannevaled merged 1 commit into
mainfrom
security/rvv-gemm32-audit
Nov 9, 2026
Merged

tannevaled merged 1 commit into
mainfrom
security/rvv-gemm32-audit

Conversation

@tannevaled

Copy link
Copy Markdown
Contributor

v0.38.0 shipped the riscv64 float32 GEMM kernel (gemmMicro6x16RVV, #108) without its SECURITY.md audit entry. This PR adds the entry. No code changes.

  • The wrapper gemmMicro32 bounds-checks the kernel's whole reach before the call: pa[kc*6-1], pb[kc*16-1] and dst[5*ldc+15]. It sits behind useRVV (V reported in AT_HWCAP).
  • TestGemmMicroStaysInsideItsOperands runs whichever gemm32 the CPU selects, between PROT_NONE pages. It passed on a real SpacemiT X60 with the rest of the kernels suite and the root suite.
  • CI's riscv64 lane runs it with V enabled.

🤖 Generated with Claude Code

v0.38.0 shipped gemmMicro6x16RVV without its SECURITY.md entry. Its
wrapper bounds-checks kc*6, kc*16 and the 6x16 C tile before the call,
behind useRVV; the fence test, which runs whichever gemm32 the CPU
selects, passed on the X60, and CI's riscv64 lane runs it with V on.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
@tannevaled
tannevaled merged commit 9179467 into main Nov 9, 2026
13 checks passed
@tannevaled
tannevaled deleted the security/rvv-gemm32-audit branch November 9, 2026 10:34
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant