Skip to content
View dvdtrk's full-sized avatar

Block or report dvdtrk

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Content in all repositories owned by your account will be closed.
Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. dvdtrk dvdtrk Public

    Config files for my GitHub profile.

  2. RL-Override RL-Override Public

    JavaScript

  3. rover-testbed rover-testbed Public

    Python

  4. mips-soc mips-soc Public

    A pipelined MIPS CPU implemented in SystemVerilog on a Terasic DE10-Lite FPGA, being extended with a graphics accelerator and peripherals to explore GPU-adjacent hardware design.

    SystemVerilog

  5. orbbec_scan_to_stl orbbec_scan_to_stl Public

    Python