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With the current implementation of the TLB, only page table walks get cached, the checking whether the PTE is valid is done every time. This can be mitigated by:
Caching the access type together with the translated address, this allows skipping the check for allowed accesses
Also caching the privilege mode, for which a given access occurred
Flushing relevant parts of the TLB when mstatus updates, in particular the SUM, MPRV and MXR bits
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