From c42448098a75deef8e6546603caa3cd7c9b35cf1 Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Wed, 19 Apr 2023 17:09:53 +0300 Subject: [PATCH] schedule: zephyr_dma_domain: Add macro for interrupt_clear_mask() on ARM64 In the case of ARM64 with GIC, the interrupts are cleared after the ISR is executed (for reference please see arm_gic_eoi() and arch/arm64/core/isr_wrapper.S from Zephyr). Thanks to this, we don't need to clear them explicitly, hence there's no need for interrupt_clear_mask() to be defined. This commit fixes linkage problems caused by the fact that interrupt_clear_mask() is not defined on ARM64. Signed-off-by: Laurentiu Mihalcea --- src/schedule/zephyr_dma_domain.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/schedule/zephyr_dma_domain.c b/src/schedule/zephyr_dma_domain.c index eb0f57ba3467..036a2aa648f2 100644 --- a/src/schedule/zephyr_dma_domain.c +++ b/src/schedule/zephyr_dma_domain.c @@ -32,6 +32,10 @@ LOG_MODULE_DECLARE(ll_schedule, CONFIG_SOF_LOG_LEVEL); #define interrupt_disable mux_interrupt_disable #endif +#ifdef CONFIG_ARM64 +#define interrupt_clear_mask(irq, bit) +#endif /* CONFIG_ARM64 */ + #define SEM_LIMIT 1 #define ZEPHYR_PDOMAIN_STACK_SIZE 8192