diff --git a/configure.ac b/configure.ac index f7a75fe6a818..ed3288fa1d48 100644 --- a/configure.ac +++ b/configure.ac @@ -454,11 +454,16 @@ AC_CONFIG_FILES([ src/audio/Makefile src/math/Makefile src/drivers/Makefile + src/drivers/intel/Makefile + src/drivers/intel/baytrail/Makefile + src/drivers/intel/haswell/Makefile + src/drivers/intel/cavs/Makefile src/include/Makefile src/include/sof/Makefile src/include/sof/audio/Makefile src/include/sof/audio/coefficients/Makefile src/include/sof/audio/coefficients/src/Makefile + src/include/sof/drivers/Makefile src/include/sof/math/Makefile src/include/uapi/Makefile src/ipc/Makefile diff --git a/src/arch/xtensa/Makefile.am b/src/arch/xtensa/Makefile.am index 0fd86357444c..d59f5aad4072 100644 --- a/src/arch/xtensa/Makefile.am +++ b/src/arch/xtensa/Makefile.am @@ -94,7 +94,7 @@ sof_LDADD = \ ../../ipc/libsof_ipc.a \ ../../lib/libdma.a \ ../../audio/libaudio.a \ - ../../drivers/libdrivers.a \ + ../../drivers/libdrivers.la \ ../../math/libsof_math.a \ -lgcc diff --git a/src/drivers/Makefile.am b/src/drivers/Makefile.am index 0a85b027397c..7bbb29442b85 100644 --- a/src/drivers/Makefile.am +++ b/src/drivers/Makefile.am @@ -1,47 +1,15 @@ -noinst_LIBRARIES = libdrivers.a +SUBDIRS = intel -libdrivers_a_SOURCES = \ - dw-dma.c +noinst_LTLIBRARIES = libdrivers.la -if BUILD_BAYTRAIL -libdrivers_a_SOURCES += \ - byt-ssp.c -endif - -if BUILD_CHERRYTRAIL -libdrivers_a_SOURCES += \ - byt-ssp.c -endif - -if BUILD_HASWELL -libdrivers_a_SOURCES += \ - hsw-ssp.c -endif - -if BUILD_BROADWELL -libdrivers_a_SOURCES += \ - hsw-ssp.c -endif - -if BUILD_APOLLOLAKE -libdrivers_a_SOURCES += \ - apl-ssp.c \ - hda-dma.c \ - cavs-hda.c \ - dmic.c -endif - -if BUILD_CANNONLAKE -libdrivers_a_SOURCES += \ - apl-ssp.c \ - hda-dma.c \ - cavs-hda.c \ - dmic.c -endif - -libdrivers_a_CFLAGS = \ +libdrivers_la_CFLAGS = \ $(AM_CFLAGS) \ $(ARCH_CFLAGS) \ $(PLATFORM_INCDIR) \ $(SOF_INCDIR) \ $(ARCH_INCDIR) + +# This lib is just composition of convenience libraries +libdrivers_la_SOURCES = + +libdrivers_la_LIBADD = intel/libdrivers.la diff --git a/src/drivers/intel/Makefile.am b/src/drivers/intel/Makefile.am new file mode 100644 index 000000000000..0b69064d5cd9 --- /dev/null +++ b/src/drivers/intel/Makefile.am @@ -0,0 +1,39 @@ +noinst_LTLIBRARIES = libdrivers.la + +libdrivers_la_CFLAGS = \ + $(AM_CFLAGS) \ + $(ARCH_CFLAGS) \ + $(PLATFORM_INCDIR) \ + $(SOF_INCDIR) \ + $(ARCH_INCDIR) + +libdrivers_la_SOURCES = dw-dma.c + +if BUILD_CAVS + +SUBDIRS = cavs +libdrivers_la_LIBADD = cavs/libdrivers.la + +else + +if BUILD_BAYTRAIL +SUBDIRS = baytrail +libdrivers_la_LIBADD = baytrail/libdrivers.la +endif + +if BUILD_CHERRYTRAIL +SUBDIRS = baytrail +libdrivers_la_LIBADD = baytrail/libdrivers.la +endif + +if BUILD_HASWELL +SUBDIRS = haswell +libdrivers_la_LIBADD = haswell/libdrivers.la +endif + +if BUILD_BROADWELL +SUBDIRS = haswell +libdrivers_la_LIBADD = haswell/libdrivers.la +endif + +endif diff --git a/src/drivers/intel/baytrail/Makefile.am b/src/drivers/intel/baytrail/Makefile.am new file mode 100644 index 000000000000..ba31b176c479 --- /dev/null +++ b/src/drivers/intel/baytrail/Makefile.am @@ -0,0 +1,14 @@ +noinst_LTLIBRARIES = libdrivers.la + +libdrivers_la_SOURCES = \ + clk.c \ + interrupt.c \ + ssp.c \ + timer.c + +libdrivers_la_CFLAGS = \ + $(AM_CFLAGS) \ + $(ARCH_CFLAGS) \ + $(PLATFORM_INCDIR) \ + $(SOF_INCDIR) \ + $(ARCH_INCDIR) \ No newline at end of file diff --git a/src/platform/baytrail/clk.c b/src/drivers/intel/baytrail/clk.c similarity index 96% rename from src/platform/baytrail/clk.c rename to src/drivers/intel/baytrail/clk.c index 00baec000d7d..72dd62c83e48 100644 --- a/src/platform/baytrail/clk.c +++ b/src/drivers/intel/baytrail/clk.c @@ -29,6 +29,7 @@ * Keyon Jie */ +#include #include #include #include @@ -49,6 +50,8 @@ struct clk_data { uint32_t freq; uint32_t ticks_per_usec; + + /* for synchronizing freq set for each clock */ spinlock_t lock; }; @@ -111,10 +114,8 @@ static const struct freq_table ssp_freq[] = { #error No target defined #endif - - static inline uint32_t get_freq(const struct freq_table *table, int size, - unsigned int hz) + unsigned int hz) { uint32_t i; @@ -172,16 +173,15 @@ uint32_t clock_set_freq(int clock, uint32_t hz) /* tell anyone interested we are about to change CPU freq */ notifier_event(NOTIFIER_ID_CPU_FREQ, CLOCK_NOTIFY_PRE, - ¬ify_data); + ¬ify_data); /* set CPU frequency request for CCU */ io_reg_update_bits(SHIM_BASE + SHIM_FR_LAT_REQ, - SHIM_FR_LAT_CLK_MASK, cpu_freq[idx].enc); + SHIM_FR_LAT_CLK_MASK, cpu_freq[idx].enc); /* send freq request to SC */ err = ipc_pmc_send_msg(PMC_SET_LPECLK); if (err == 0) { - /* update clock frequency */ clk_pdata->clk[clock].freq = cpu_freq[idx].freq; clk_pdata->clk[clock].ticks_per_usec = @@ -190,7 +190,7 @@ uint32_t clock_set_freq(int clock, uint32_t hz) /* tell anyone interested we have now changed CPU freq */ notifier_event(NOTIFIER_ID_CPU_FREQ, CLOCK_NOTIFY_POST, - ¬ify_data); + ¬ify_data); break; case CLK_SSP: /* get nearest frequency that is >= requested Hz */ @@ -199,12 +199,11 @@ uint32_t clock_set_freq(int clock, uint32_t hz) /* tell anyone interested we are about to change CPU freq */ notifier_event(NOTIFIER_ID_SSP_FREQ, CLOCK_NOTIFY_PRE, - ¬ify_data); + ¬ify_data); /* send SSP freq request to SC */ err = ipc_pmc_send_msg(ssp_freq[idx].enc); if (err == 0) { - /* update clock frequency */ clk_pdata->clk[clock].freq = ssp_freq[idx].freq; clk_pdata->clk[clock].ticks_per_usec = @@ -213,7 +212,7 @@ uint32_t clock_set_freq(int clock, uint32_t hz) /* tell anyone interested we have now changed CPU freq */ notifier_event(NOTIFIER_ID_SSP_FREQ, CLOCK_NOTIFY_POST, - ¬ify_data); + ¬ify_data); break; default: diff --git a/src/drivers/intel/baytrail/interrupt.c b/src/drivers/intel/baytrail/interrupt.c new file mode 100644 index 000000000000..56c185684425 --- /dev/null +++ b/src/drivers/intel/baytrail/interrupt.c @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Liam Girdwood + * Keyon Jie + * Janusz Jankowski + * + */ + +#include +#include + +void platform_interrupt_init(void) {} + +struct irq_desc *platform_irq_get_parent(uint32_t irq) +{ + return NULL; +} + +void platform_interrupt_set(int irq) +{ + arch_interrupt_set(irq); +} + +/* clear mask in PISR, bits are W1C in docs but some bits need preserved ?? */ +void platform_interrupt_clear(uint32_t irq, uint32_t mask) +{ + switch (irq) { + case IRQ_NUM_EXT_SSP0: + shim_write(SHIM_PISR, mask << 3); + interrupt_clear(irq); + break; + case IRQ_NUM_EXT_SSP1: + shim_write(SHIM_PISR, mask << 4); + interrupt_clear(irq); + break; + case IRQ_NUM_EXT_SSP2: + shim_write(SHIM_PISR, mask << 5); + interrupt_clear(irq); + break; + case IRQ_NUM_EXT_DMAC0: + shim_write(SHIM_PISR, mask << 16); + interrupt_clear(irq); + break; + case IRQ_NUM_EXT_DMAC1: + shim_write(SHIM_PISR, mask << 24); + interrupt_clear(irq); + break; +#if defined CONFIG_CHERRYTRAIL + case IRQ_NUM_EXT_DMAC2: + shim_write(SHIM_PISRH, mask << 0); + interrupt_clear(irq); + break; + case IRQ_NUM_EXT_SSP3: + shim_write(SHIM_PISRH, mask << 8); + interrupt_clear(irq); + break; + case IRQ_NUM_EXT_SSP4: + shim_write(SHIM_PISRH, mask << 9); + interrupt_clear(irq); + break; + case IRQ_NUM_EXT_SSP5: + shim_write(SHIM_PISRH, mask << 10); + interrupt_clear(irq); + break; +#endif + default: + break; + } +} + +/* TODO: expand this to 64 bit - should we just return mask of IRQ numbers */ +uint32_t platform_interrupt_get_enabled(void) +{ + return shim_read(SHIM_PIMR); +} + +void platform_interrupt_mask(uint32_t irq, uint32_t mask) +{ + switch (irq) { + case IRQ_NUM_EXT_SSP0: + shim_write(SHIM_PIMR, mask << 3); + break; + case IRQ_NUM_EXT_SSP1: + shim_write(SHIM_PIMR, mask << 4); + break; + case IRQ_NUM_EXT_SSP2: + shim_write(SHIM_PIMR, mask << 5); + break; + case IRQ_NUM_EXT_DMAC0: + shim_write(SHIM_PIMR, mask << 16); + break; + case IRQ_NUM_EXT_DMAC1: + shim_write(SHIM_PIMR, mask << 24); + break; +#if defined CONFIG_CHERRYTRAIL + case IRQ_NUM_EXT_DMAC2: + shim_write(SHIM_PIMRH, mask << 8); + break; + case IRQ_NUM_EXT_SSP3: + shim_write(SHIM_PIMRH, mask << 0); + break; + case IRQ_NUM_EXT_SSP4: + shim_write(SHIM_PIMRH, mask << 1); + break; + case IRQ_NUM_EXT_SSP5: + shim_write(SHIM_PIMRH, mask << 2); + break; +#endif + default: + break; + } +} + +void platform_interrupt_unmask(uint32_t irq, uint32_t mask) +{ + switch (irq) { + case IRQ_NUM_EXT_SSP0: + shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 3)); + break; + case IRQ_NUM_EXT_SSP1: + shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 4)); + break; + case IRQ_NUM_EXT_SSP2: + shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 5)); + break; + case IRQ_NUM_EXT_DMAC0: + shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 16)); + break; + case IRQ_NUM_EXT_DMAC1: + shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 24)); + break; +#if defined CONFIG_CHERRYTRAIL + case IRQ_NUM_EXT_DMAC2: + shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 8)); + break; + case IRQ_NUM_EXT_SSP3: + shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 0)); + break; + case IRQ_NUM_EXT_SSP4: + shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 1)); + break; + case IRQ_NUM_EXT_SSP5: + shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 2)); + break; +#endif + default: + break; + } +} diff --git a/src/drivers/byt-ssp.c b/src/drivers/intel/baytrail/ssp.c similarity index 99% rename from src/drivers/byt-ssp.c rename to src/drivers/intel/baytrail/ssp.c index 4759d292a414..e46188345cf1 100644 --- a/src/drivers/byt-ssp.c +++ b/src/drivers/intel/baytrail/ssp.c @@ -612,7 +612,9 @@ static int ssp_probe(struct dai *dai) ssp->state[DAI_DIR_CAPTURE] = COMP_STATE_READY; #if defined CONFIG_CHERRYTRAIL - /* register our IRQ handler - CHT shares SSP 0,1,2 IRQs with SSP 3,4,5 */ + /* register our IRQ handler + * - CHT shares SSP 0,1,2 IRQs with SSP 3,4,5 + */ if (ssp_irq(dai) >= IRQ_CHT_SSP_OFFSET) interrupt_register(ssp_irq(dai) - IRQ_CHT_SSP_OFFSET, ssp_irq_handler, dai); diff --git a/src/platform/baytrail/timer.c b/src/drivers/intel/baytrail/timer.c similarity index 93% rename from src/platform/baytrail/timer.c rename to src/drivers/intel/baytrail/timer.c index 835b2eee3b80..d001eb1dd3d7 100644 --- a/src/platform/baytrail/timer.c +++ b/src/drivers/intel/baytrail/timer.c @@ -35,6 +35,7 @@ #include #include #include +#include #include struct timer_data { @@ -112,13 +113,13 @@ int platform_timer_set(struct timer *timer, uint64_t ticks) /* cant be in the past */ arch_interrupt_global_enable(flags); return -EINVAL; - } else { - /* set for checking at next timeout */ - time = ticks; - timer->hitimeout = hitimeout; - timer->lowtimeout = ticks; } + /* set for checking at next timeout */ + time = ticks; + timer->hitimeout = hitimeout; + timer->lowtimeout = ticks; + /* set new value and run */ shim_write(SHIM_EXT_TIMER_CNTLH, SHIM_EXT_TIMER_RUN); shim_write(SHIM_EXT_TIMER_CNTLL, time); @@ -148,7 +149,7 @@ uint64_t platform_timer_get(struct timer *timer) /* check and see whether 32bit IRQ is pending for timer */ if (arch_interrupt_get_status() & IRQ_MASK_EXT_TIMER && - shim_read(SHIM_EXT_TIMER_CNTLL) == 1) { + shim_read(SHIM_EXT_TIMER_CNTLL) == 1) { /* yes, overflow has occurred but handler has not run */ high = timer->hitime + 1; } else { @@ -165,7 +166,7 @@ uint64_t platform_timer_get(struct timer *timer) /* get timestamp for host stream DMA position */ void platform_host_timestamp(struct comp_dev *host, - struct sof_ipc_stream_posn *posn) + struct sof_ipc_stream_posn *posn) { int err; @@ -177,7 +178,7 @@ void platform_host_timestamp(struct comp_dev *host, /* get timestamp for DAI stream DMA position */ void platform_dai_timestamp(struct comp_dev *dai, - struct sof_ipc_stream_posn *posn) + struct sof_ipc_stream_posn *posn) { int err; @@ -199,7 +200,7 @@ void platform_dai_wallclock(struct comp_dev *dai, uint64_t *wallclock) } static int platform_timer_register(struct timer *timer, - void(*handler)(void *arg), void *arg) + void (*handler)(void *arg), void *arg) { struct timer_data *tdata = &xtimer[0]; uint32_t flags; @@ -211,7 +212,8 @@ static int platform_timer_register(struct timer *timer, timer->timer_data = tdata; timer->hitime = 0; timer->hitimeout = 0; - ret = arch_interrupt_register(timer->id, platform_timer_64_handler, timer); + ret = arch_interrupt_register(timer->id, + platform_timer_64_handler, timer); arch_interrupt_global_enable(flags); return ret; diff --git a/src/drivers/intel/cavs/Makefile.am b/src/drivers/intel/cavs/Makefile.am new file mode 100644 index 000000000000..16bead8df6c3 --- /dev/null +++ b/src/drivers/intel/cavs/Makefile.am @@ -0,0 +1,17 @@ +noinst_LTLIBRARIES = libdrivers.la + +libdrivers_la_SOURCES = \ + clk.c \ + dmic.c \ + hda-dma.c \ + hda.c \ + interrupt.c \ + ssp.c \ + timer.c + +libdrivers_la_CFLAGS = \ + $(AM_CFLAGS) \ + $(ARCH_CFLAGS) \ + $(PLATFORM_INCDIR) \ + $(SOF_INCDIR) \ + $(ARCH_INCDIR) diff --git a/src/platform/intel/cavs/clk.c b/src/drivers/intel/cavs/clk.c similarity index 96% rename from src/platform/intel/cavs/clk.c rename to src/drivers/intel/cavs/clk.c index c49fc00846c7..77ffee2d4063 100644 --- a/src/platform/intel/cavs/clk.c +++ b/src/drivers/intel/cavs/clk.c @@ -31,6 +31,7 @@ * Janusz Jankowski */ +#include #include #include #include @@ -51,6 +52,8 @@ struct clk_data { uint32_t freq; uint32_t ticks_per_usec; uint32_t ticks_per_msec; + + /* for synchronizing freq set for each clock */ spinlock_t lock; }; @@ -107,7 +110,7 @@ static const struct freq_table ssp_freq[] = { #endif static inline uint32_t get_freq(const struct freq_table *table, int size, - unsigned int hz) + unsigned int hz) { uint32_t i; @@ -163,19 +166,19 @@ uint32_t clock_set_freq(int clock, uint32_t hz) /* tell anyone interested we are about to change CPU freq */ notifier_event(NOTIFIER_ID_CPU_FREQ, CLOCK_NOTIFY_PRE, - ¬ify_data); + ¬ify_data); /* set CPU frequency request for CCU */ #if defined(CONFIG_APOLLOLAKE) io_reg_update_bits(SHIM_BASE + SHIM_CLKCTL, - SHIM_CLKCTL_HDCS, 0); + SHIM_CLKCTL_HDCS, 0); #endif io_reg_update_bits(SHIM_BASE + SHIM_CLKCTL, - SHIM_CLKCTL_DPCS_MASK(0), cpu_freq[idx].enc); + SHIM_CLKCTL_DPCS_MASK(0), cpu_freq[idx].enc); /* tell anyone interested we have now changed CPU freq */ notifier_event(NOTIFIER_ID_CPU_FREQ, CLOCK_NOTIFY_POST, - ¬ify_data); + ¬ify_data); break; case CLK_SSP: default: diff --git a/src/drivers/dmic.c b/src/drivers/intel/cavs/dmic.c similarity index 100% rename from src/drivers/dmic.c rename to src/drivers/intel/cavs/dmic.c diff --git a/src/drivers/hda-dma.c b/src/drivers/intel/cavs/hda-dma.c similarity index 100% rename from src/drivers/hda-dma.c rename to src/drivers/intel/cavs/hda-dma.c diff --git a/src/drivers/cavs-hda.c b/src/drivers/intel/cavs/hda.c similarity index 100% rename from src/drivers/cavs-hda.c rename to src/drivers/intel/cavs/hda.c diff --git a/src/platform/intel/cavs/interrupt.c b/src/drivers/intel/cavs/interrupt.c similarity index 99% rename from src/platform/intel/cavs/interrupt.c rename to src/drivers/intel/cavs/interrupt.c index c01eb3b70118..2c171db7499f 100644 --- a/src/platform/intel/cavs/interrupt.c +++ b/src/drivers/intel/cavs/interrupt.c @@ -65,7 +65,6 @@ static inline void irq_lvl2_handler(void *data, /* handle each child */ while (status) { - /* any IRQ for this child bit ? */ if ((status & 0x1) == 0) goto next; @@ -193,7 +192,6 @@ void platform_interrupt_mask(uint32_t irq, uint32_t mask) default: break; } - } void platform_interrupt_unmask(uint32_t irq, uint32_t mask) @@ -217,7 +215,6 @@ void platform_interrupt_unmask(uint32_t irq, uint32_t mask) default: break; } - } void platform_interrupt_clear(uint32_t irq, uint32_t mask) diff --git a/src/drivers/apl-ssp.c b/src/drivers/intel/cavs/ssp.c similarity index 100% rename from src/drivers/apl-ssp.c rename to src/drivers/intel/cavs/ssp.c diff --git a/src/platform/intel/cavs/timer.c b/src/drivers/intel/cavs/timer.c similarity index 90% rename from src/platform/intel/cavs/timer.c rename to src/drivers/intel/cavs/timer.c index de745c4f72b7..89ab4f669443 100644 --- a/src/platform/intel/cavs/timer.c +++ b/src/drivers/intel/cavs/timer.c @@ -35,6 +35,7 @@ #include #include #include +#include #include void platform_timer_start(struct timer *timer) @@ -42,7 +43,7 @@ void platform_timer_start(struct timer *timer) /* run timer */ shim_write64(SHIM_DSPWCT0C, 0); shim_write(SHIM_DSPWCTCS, - shim_read(SHIM_DSPWCTCS) | SHIM_DSPWCTCS_T0A); + shim_read(SHIM_DSPWCTCS) | SHIM_DSPWCTCS_T0A); } void platform_timer_stop(struct timer *timer) @@ -50,7 +51,7 @@ void platform_timer_stop(struct timer *timer) /* stop timer */ shim_write64(SHIM_DSPWCT0C, 0); shim_write(SHIM_DSPWCTCS, - shim_read(SHIM_DSPWCTCS) & ~SHIM_DSPWCTCS_T0A); + shim_read(SHIM_DSPWCTCS) & ~SHIM_DSPWCTCS_T0A); } int platform_timer_set(struct timer *timer, uint64_t ticks) @@ -62,7 +63,7 @@ int platform_timer_set(struct timer *timer, uint64_t ticks) /* set new value and run */ shim_write64(SHIM_DSPWCT0C, ticks); shim_write(SHIM_DSPWCTCS, - shim_read(SHIM_DSPWCTCS) | SHIM_DSPWCTCS_T0A); + shim_read(SHIM_DSPWCTCS) | SHIM_DSPWCTCS_T0A); return 0; } @@ -71,7 +72,7 @@ void platform_timer_clear(struct timer *timer) { /* write 1 to clear the timer interrupt */ shim_write(SHIM_DSPWCTCS, - shim_read(SHIM_DSPWCTCS) | SHIM_DSPWCTCS_T0T); + shim_read(SHIM_DSPWCTCS) | SHIM_DSPWCTCS_T0T); } uint64_t platform_timer_get(struct timer *timer) @@ -82,7 +83,7 @@ uint64_t platform_timer_get(struct timer *timer) /* get timestamp for host stream DMA position */ void platform_host_timestamp(struct comp_dev *host, - struct sof_ipc_stream_posn *posn) + struct sof_ipc_stream_posn *posn) { int err; @@ -94,7 +95,7 @@ void platform_host_timestamp(struct comp_dev *host, /* get timestamp for DAI stream DMA position */ void platform_dai_timestamp(struct comp_dev *dai, - struct sof_ipc_stream_posn *posn) + struct sof_ipc_stream_posn *posn) { int err; @@ -114,8 +115,8 @@ void platform_dai_wallclock(struct comp_dev *dai, uint64_t *wallclock) *wallclock = shim_read64(SHIM_DSPWC); } -int platform_timer_register(struct timer *timer, - void (*handler)(void *arg), void *arg) +static int platform_timer_register(struct timer *timer, + void (*handler)(void *arg), void *arg) { return interrupt_register(timer->irq, handler, arg); } diff --git a/src/drivers/dw-dma.c b/src/drivers/intel/dw-dma.c similarity index 96% rename from src/drivers/dw-dma.c rename to src/drivers/intel/dw-dma.c index db361d1e5b47..1036fdc087ac 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/intel/dw-dma.c @@ -149,7 +149,7 @@ #define DW_CTLL_RELOAD_DST (1 << 31) /* Haswell / Broadwell specific registers */ -#if defined (CONFIG_HASWELL) || defined (CONFIG_BROADWELL) +#if defined(CONFIG_HASWELL) || defined(CONFIG_BROADWELL) /* CTL_HI */ #define DW_CTLH_DONE(x) ((x) << 12) @@ -166,7 +166,7 @@ #define DW_CFG_LOW_DEF 0x0 #define DW_CFG_HIGH_DEF 0x4 -#elif defined (CONFIG_BAYTRAIL) || defined (CONFIG_CHERRYTRAIL) +#elif defined(CONFIG_BAYTRAIL) || defined(CONFIG_CHERRYTRAIL) /* baytrail specific registers */ /* CTL_LO */ @@ -198,7 +198,7 @@ #define DW_CFG_LOW_DEF 0x00000003 #define DW_CFG_HIGH_DEF 0x0 -#elif defined (CONFIG_APOLLOLAKE) || defined (CONFIG_CANNONLAKE) +#elif defined(CONFIG_APOLLOLAKE) || defined(CONFIG_CANNONLAKE) /* CTL_LO */ #define DW_CTLL_S_GATH_EN (1 << 17) @@ -267,9 +267,12 @@ struct dma_chan_data { uint32_t cfg_hi; struct dma_id id; - void (*cb)(void *data, uint32_t type, struct dma_sg_elem *next); /* client callback function */ - void *cb_data; /* client callback data */ - int cb_type; /* callback type */ + /* client callback function */ + void (*cb)(void *data, uint32_t type, struct dma_sg_elem *next); + /* client callback data */ + void *cb_data; + /* callback type */ + int cb_type; }; /* private data for DW DMA engine */ @@ -403,7 +406,8 @@ static int dw_dma_start(struct dma *dma, int channel) } /* write interrupt clear registers for the channel: - ClearTfr, ClearBlock, ClearSrcTran, ClearDstTran, ClearErr*/ + * ClearTfr, ClearBlock, ClearSrcTran, ClearDstTran, ClearErr + */ dw_write(dma, DW_CLEAR_TFR, 0x1 << channel); dw_write(dma, DW_CLEAR_BLOCK, 0x1 << channel); dw_write(dma, DW_CLEAR_SRC_TRAN, 0x1 << channel); @@ -682,7 +686,9 @@ static int dw_dma_set_config(struct dma *dma, int channel, lli_desc->ctrl_lo |= DW_CTLL_DST_MSIZE(msize); lli_desc->ctrl_lo |= DW_CTLL_INT_EN; /* enable interrupt */ - /* config the SINC and DINC field of CTL_LOn, SRC/DST_PER filed of CFGn */ + /* config the SINC and DINC field of CTL_LOn, + * SRC/DST_PER filed of CFGn + */ switch (config->direction) { case DMA_DIR_LMEM_TO_HMEM: lli_desc->ctrl_lo |= DW_CTLL_FC_M2M; @@ -703,7 +709,8 @@ static int dw_dma_set_config(struct dma *dma, int channel, DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN; #endif lli_desc->dar = - (uint32_t)sg_elem->dest | PLATFORM_HOST_DMA_MASK; + (uint32_t)sg_elem->dest + | PLATFORM_HOST_DMA_MASK; lli_desc->sar = (uint32_t)sg_elem->src; break; case DMA_DIR_MEM_TO_MEM: @@ -713,8 +720,10 @@ static int dw_dma_set_config(struct dma *dma, int channel, lli_desc->ctrl_lo |= DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN; #endif - lli_desc->sar = (uint32_t)sg_elem->src | PLATFORM_HOST_DMA_MASK; - lli_desc->dar = (uint32_t)sg_elem->dest | PLATFORM_HOST_DMA_MASK; + lli_desc->sar = (uint32_t)sg_elem->src + | PLATFORM_HOST_DMA_MASK; + lli_desc->dar = (uint32_t)sg_elem->dest + | PLATFORM_HOST_DMA_MASK; break; case DMA_DIR_MEM_TO_DEV: lli_desc->ctrl_lo |= DW_CTLL_FC_M2P; @@ -726,7 +735,8 @@ static int dw_dma_set_config(struct dma *dma, int channel, #endif p->chan[channel].cfg_hi |= DW_CFGH_DST_PER(config->dest_dev); - lli_desc->sar = (uint32_t)sg_elem->src | PLATFORM_HOST_DMA_MASK; + lli_desc->sar = (uint32_t)sg_elem->src + | PLATFORM_HOST_DMA_MASK; lli_desc->dar = (uint32_t)sg_elem->dest; break; case DMA_DIR_DEV_TO_MEM: @@ -740,7 +750,8 @@ static int dw_dma_set_config(struct dma *dma, int channel, p->chan[channel].cfg_hi |= DW_CFGH_SRC_PER(config->src_dev); lli_desc->sar = (uint32_t)sg_elem->src; - lli_desc->dar = (uint32_t)sg_elem->dest | PLATFORM_HOST_DMA_MASK; + lli_desc->dar = (uint32_t)sg_elem->dest + | PLATFORM_HOST_DMA_MASK; break; case DMA_DIR_DEV_TO_DEV: lli_desc->ctrl_lo |= DW_CTLL_FC_P2P; @@ -774,7 +785,8 @@ static int dw_dma_set_config(struct dma *dma, int channel, (sg_elem->size & DW_CTLH_BLOCK_TS_MASK); #elif defined CONFIG_BROADWELL || defined CONFIG_HASWELL /* for bdw, the unit is transaction--TR_WIDTH. */ - lli_desc->ctrl_hi = (sg_elem->size / (1 << (lli_desc->ctrl_lo >> 4 & 0x7))) + lli_desc->ctrl_hi = (sg_elem->size / + (1 << (lli_desc->ctrl_lo >> 4 & 0x7))) & DW_CTLH_BLOCK_TS_MASK; #endif @@ -1131,11 +1143,13 @@ static void dw_dma_irq_handler(void *data) uint32_t mask; uint32_t pmask; int i; +#if DW_USE_HW_LLI + const size_t lli_current_size = sizeof(*p->chan[i].lli_current); +#endif status_intr = dw_read(dma, DW_INTR_STATUS); - if (!status_intr) { + if (!status_intr) return; - } tracev_dma("DIr"); @@ -1150,9 +1164,8 @@ static void dw_dma_irq_handler(void *data) /* TODO: handle errors, just clear them atm */ status_err = dw_read(dma, DW_STATUS_ERR); dw_write(dma, DW_CLEAR_ERR, status_err); - if (status_err) { + if (status_err) trace_dma_error("eI1"); - } /* clear platform and DSP interrupt */ pmask = status_block | status_tfr | status_err; @@ -1190,8 +1203,9 @@ static void dw_dma_irq_handler(void *data) } p->chan[i].lli_current->ctrl_hi &= ~DW_CTLH_DONE(1); + dcache_writeback_region(p->chan[i].lli_current, - sizeof(*p->chan[i].lli_current)); + lli_current_size); p->chan[i].lli_current = (struct dw_lli2 *)p->chan[i].lli_current->llp; @@ -1217,11 +1231,15 @@ static void dw_dma_irq_handler(void *data) * otherwise, reload lli */ switch (next.size) { - case DMA_RELOAD_END: + case DMA_RELOAD_END: { p->chan[i].status = COMP_STATE_PREPARE; + + void *llp = (void *)p->chan[i].lli_current->llp; + p->chan[i].lli_current = - (struct dw_lli2 *)p->chan[i].lli_current->llp; + (struct dw_lli2 *)llp; break; + } case DMA_RELOAD_LLI: dw_dma_chan_reload_lli(dma, i); break; diff --git a/src/drivers/intel/haswell/Makefile.am b/src/drivers/intel/haswell/Makefile.am new file mode 100644 index 000000000000..ba31b176c479 --- /dev/null +++ b/src/drivers/intel/haswell/Makefile.am @@ -0,0 +1,14 @@ +noinst_LTLIBRARIES = libdrivers.la + +libdrivers_la_SOURCES = \ + clk.c \ + interrupt.c \ + ssp.c \ + timer.c + +libdrivers_la_CFLAGS = \ + $(AM_CFLAGS) \ + $(ARCH_CFLAGS) \ + $(PLATFORM_INCDIR) \ + $(SOF_INCDIR) \ + $(ARCH_INCDIR) \ No newline at end of file diff --git a/src/platform/haswell/clk.c b/src/drivers/intel/haswell/clk.c similarity index 96% rename from src/platform/haswell/clk.c rename to src/drivers/intel/haswell/clk.c index 0482aab353de..42b646633954 100644 --- a/src/platform/haswell/clk.c +++ b/src/drivers/intel/haswell/clk.c @@ -28,6 +28,7 @@ * Author: Liam Girdwood */ +#include #include #include #include @@ -47,6 +48,8 @@ struct clk_data { uint32_t freq; uint32_t ticks_per_usec; + + /* for synchronizing freq set for each clock */ spinlock_t lock; }; @@ -81,7 +84,7 @@ static const struct freq_table ssp_freq[] = { #define SSP_DEFAULT_IDX 0 static inline uint32_t get_freq(const struct freq_table *table, int size, - unsigned int hz) + unsigned int hz) { uint32_t i; @@ -138,16 +141,16 @@ uint32_t clock_set_freq(int clock, uint32_t hz) /* tell anyone interested we are about to change CPU freq */ notifier_event(NOTIFIER_ID_CPU_FREQ, CLOCK_NOTIFY_PRE, - ¬ify_data); + ¬ify_data); /* set CPU frequency request for CCU */ io_reg_update_bits(SHIM_BASE + SHIM_CSR, - SHIM_CSR_DCS_MASK, - SHIM_CSR_DCS(cpu_freq[idx].enc)); + SHIM_CSR_DCS_MASK, + SHIM_CSR_DCS(cpu_freq[idx].enc)); /* tell anyone interested we have now changed CPU freq */ notifier_event(NOTIFIER_ID_CPU_FREQ, CLOCK_NOTIFY_POST, - ¬ify_data); + ¬ify_data); break; case CLK_SSP: default: diff --git a/src/drivers/intel/haswell/interrupt.c b/src/drivers/intel/haswell/interrupt.c new file mode 100644 index 000000000000..70645666fe55 --- /dev/null +++ b/src/drivers/intel/haswell/interrupt.c @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Liam Girdwood + * Keyon Jie + * Janusz Jankowski + * + */ + +#include +#include + +void platform_interrupt_init(void) {} + +/* haswell does not support child IRQs */ +struct irq_desc *platform_irq_get_parent(uint32_t irq) +{ + return NULL; +} + +void platform_interrupt_set(int irq) +{ + arch_interrupt_set(irq); +} + +/* clear mask in PISR, bits are W1C in docs but some bits need preserved ?? */ +void platform_interrupt_clear(uint32_t irq, uint32_t mask) +{ + switch (irq) { + case IRQ_NUM_EXT_DMAC0: + case IRQ_NUM_EXT_DMAC1: + case IRQ_NUM_EXT_SSP0: + case IRQ_NUM_EXT_SSP1: + interrupt_clear(irq); + break; + default: + break; + } +} + +/* TODO: expand this to 64 bit - should we just return mask of IRQ numbers */ +uint32_t platform_interrupt_get_enabled(void) +{ + return shim_read(SHIM_IMRD); +} + +void platform_interrupt_mask(uint32_t irq, uint32_t mask) +{ + switch (irq) { + case IRQ_NUM_EXT_SSP0: + shim_write(SHIM_IMRD, SHIM_IMRD_SSP0); + break; + case IRQ_NUM_EXT_SSP1: + shim_write(SHIM_IMRD, SHIM_IMRD_SSP1); + break; + case IRQ_NUM_EXT_DMAC0: + shim_write(SHIM_IMRD, SHIM_IMRD_DMAC0); + break; + case IRQ_NUM_EXT_DMAC1: + shim_write(SHIM_IMRD, SHIM_IMRD_DMAC1); + break; + default: + break; + } +} + +void platform_interrupt_unmask(uint32_t irq, uint32_t mask) +{ + switch (irq) { + case IRQ_NUM_EXT_SSP0: + shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_SSP0); + break; + case IRQ_NUM_EXT_SSP1: + shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_SSP1); + break; + case IRQ_NUM_EXT_DMAC0: + shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DMAC0); + break; + case IRQ_NUM_EXT_DMAC1: + shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DMAC1); + break; + default: + break; + } +} diff --git a/src/drivers/hsw-ssp.c b/src/drivers/intel/haswell/ssp.c similarity index 100% rename from src/drivers/hsw-ssp.c rename to src/drivers/intel/haswell/ssp.c diff --git a/src/platform/haswell/timer.c b/src/drivers/intel/haswell/timer.c similarity index 96% rename from src/platform/haswell/timer.c rename to src/drivers/intel/haswell/timer.c index ebdbd0796cd2..ed365e2d6e70 100644 --- a/src/platform/haswell/timer.c +++ b/src/drivers/intel/haswell/timer.c @@ -33,6 +33,7 @@ #include #include #include +#include #include void platform_timer_start(struct timer *timer) @@ -62,7 +63,7 @@ uint64_t platform_timer_get(struct timer *timer) /* get timestamp for host stream DMA position */ void platform_host_timestamp(struct comp_dev *host, - struct sof_ipc_stream_posn *posn) + struct sof_ipc_stream_posn *posn) { int err; @@ -74,7 +75,7 @@ void platform_host_timestamp(struct comp_dev *host, /* get timestamp for DAI stream DMA position */ void platform_dai_timestamp(struct comp_dev *dai, - struct sof_ipc_stream_posn *posn) + struct sof_ipc_stream_posn *posn) { int err; diff --git a/src/include/sof/drivers/Makefile.am b/src/include/sof/drivers/Makefile.am new file mode 100644 index 000000000000..fbb4611acb67 --- /dev/null +++ b/src/include/sof/drivers/Makefile.am @@ -0,0 +1,4 @@ +noinst_HEADERS = \ + clk.h \ + interrupt.h \ + timer.h diff --git a/src/include/sof/drivers/clk.h b/src/include/sof/drivers/clk.h new file mode 100644 index 000000000000..38eaa9c5d1d2 --- /dev/null +++ b/src/include/sof/drivers/clk.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Janusz Jankowski + */ + +#ifndef __INCLUDE_DRIVERS_CLK__ +#define __INCLUDE_DRIVERS_CLK__ + +void init_platform_clocks(void); + +#endif diff --git a/src/include/sof/drivers/interrupt.h b/src/include/sof/drivers/interrupt.h new file mode 100644 index 000000000000..615c6179927d --- /dev/null +++ b/src/include/sof/drivers/interrupt.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Janusz Jankowski + */ + +#ifndef __INCLUDE_DRIVERS_INTERRUPT__ +#define __INCLUDE_DRIVERS_INTERRUPT__ + +#include + +void platform_interrupt_init(void); + +struct irq_desc *platform_irq_get_parent(uint32_t irq); +void platform_interrupt_set(int irq); +void platform_interrupt_clear(uint32_t irq, uint32_t mask); +uint32_t platform_interrupt_get_enabled(void); +void platform_interrupt_mask(uint32_t irq, uint32_t mask); +void platform_interrupt_unmask(uint32_t irq, uint32_t mask); + +#endif diff --git a/src/include/sof/drivers/timer.h b/src/include/sof/drivers/timer.h new file mode 100644 index 000000000000..20c55e654f09 --- /dev/null +++ b/src/include/sof/drivers/timer.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Janusz Jankowski + */ + +#ifndef __INCLUDE_DRIVERS_TIMER__ +#define __INCLUDE_DRIVERS_TIMER__ + +#include + +struct comp_dev; +struct sof_ipc_stream_posn; + +int platform_timer_set(struct timer *timer, uint64_t ticks); +void platform_timer_clear(struct timer *timer); +uint64_t platform_timer_get(struct timer *timer); +void platform_timer_start(struct timer *timer); +void platform_timer_stop(struct timer *timer); + +/* get timestamp for host stream DMA position */ +void platform_host_timestamp(struct comp_dev *host, + struct sof_ipc_stream_posn *posn); + +/* get timestamp for DAI stream DMA position */ +void platform_dai_timestamp(struct comp_dev *dai, + struct sof_ipc_stream_posn *posn); + +/* get current wallclock for componnent */ +void platform_dai_wallclock(struct comp_dev *dai, uint64_t *wallclock); + +#endif diff --git a/src/include/sof/interrupt.h b/src/include/sof/interrupt.h index bbda635fc7b5..082299534314 100644 --- a/src/include/sof/interrupt.h +++ b/src/include/sof/interrupt.h @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include diff --git a/src/include/sof/wait.h b/src/include/sof/wait.h index feb8b29b3149..9016da8aa730 100644 --- a/src/include/sof/wait.h +++ b/src/include/sof/wait.h @@ -43,6 +43,7 @@ #include #include #include +#include #if DEBUG_LOCKS #define wait_atomic_check \ diff --git a/src/library/include/platform/clk.h b/src/library/include/platform/clk.h index 0dd11e6b68b3..97bd8351a2f1 100644 --- a/src/library/include/platform/clk.h +++ b/src/library/include/platform/clk.h @@ -37,6 +37,4 @@ #define CLK_DEFAULT_CPU_HZ 50000000 #define CLK_MAX_CPU_HZ 343000000 -void init_platform_clocks(void); - #endif diff --git a/src/platform/apollolake/include/platform/clk.h b/src/platform/apollolake/include/platform/clk.h index 5a15b8a4a6a0..6ca9ed37e685 100644 --- a/src/platform/apollolake/include/platform/clk.h +++ b/src/platform/apollolake/include/platform/clk.h @@ -38,6 +38,4 @@ #define CLK_DEFAULT_CPU_HZ 400000000 #define CLK_MAX_CPU_HZ 400000000 -void init_platform_clocks(void); - #endif diff --git a/src/platform/apollolake/include/platform/interrupt.h b/src/platform/apollolake/include/platform/interrupt.h index 677866194ce0..e60a04b7828d 100644 --- a/src/platform/apollolake/include/platform/interrupt.h +++ b/src/platform/apollolake/include/platform/interrupt.h @@ -162,13 +162,4 @@ #define IRQ_MASK_EXT_LEVEL7 (1 << IRQ_NUM_EXT_LEVEL7) #define IRQ_MASK_SOFTWARE9 (1 << IRQ_NUM_SOFTWARE9) -void platform_interrupt_init(void); - -struct irq_desc *platform_irq_get_parent(uint32_t irq); -void platform_interrupt_set(int irq); -void platform_interrupt_clear(uint32_t irq, uint32_t mask); -uint32_t platform_interrupt_get_enabled(void); -void platform_interrupt_mask(uint32_t irq, uint32_t mask); -void platform_interrupt_unmask(uint32_t irq, uint32_t mask); - #endif diff --git a/src/platform/apollolake/include/platform/timer.h b/src/platform/apollolake/include/platform/timer.h index e4977e4d4279..9f1a0fa7b4b2 100644 --- a/src/platform/apollolake/include/platform/timer.h +++ b/src/platform/apollolake/include/platform/timer.h @@ -45,25 +45,4 @@ #define TIMER3 IRQ_EXT_TSTAMP0_LVL2(0) #define TIMER4 IRQ_EXT_TSTAMP1_LVL2(0) -struct comp_dev; -struct sof_ipc_stream_posn; - -int platform_timer_set(struct timer *timer, uint64_t ticks); -void platform_timer_clear(struct timer *timer); -uint64_t platform_timer_get(struct timer *timer); -void platform_timer_start(struct timer *timer); -void platform_timer_stop(struct timer *timer); -int platform_timer_register(struct timer *timer, - void (*handler)(void *arg), void *arg); - -/* get timestamp for host stream DMA position */ -void platform_host_timestamp(struct comp_dev *host, - struct sof_ipc_stream_posn *posn); - -/* get timestamp for DAI stream DMA position */ -void platform_dai_timestamp(struct comp_dev *dai, - struct sof_ipc_stream_posn *posn); - -/* get current wallclock for componnent */ -void platform_dai_wallclock(struct comp_dev *dai, uint64_t *wallclock); #endif diff --git a/src/platform/baytrail/Makefile.am b/src/platform/baytrail/Makefile.am index 9c89029bb57b..7102391ec7fb 100644 --- a/src/platform/baytrail/Makefile.am +++ b/src/platform/baytrail/Makefile.am @@ -8,8 +8,6 @@ libplatform_la_SOURCES = \ platform.c \ dai.c \ dma.c \ - clk.c \ - timer.c \ memory.c libplatform_la_CFLAGS = \ diff --git a/src/platform/baytrail/include/platform/clk.h b/src/platform/baytrail/include/platform/clk.h index 7292b00348f7..ce424a487420 100644 --- a/src/platform/baytrail/include/platform/clk.h +++ b/src/platform/baytrail/include/platform/clk.h @@ -37,6 +37,4 @@ #define CLK_DEFAULT_CPU_HZ 50000000 #define CLK_MAX_CPU_HZ 343000000 -void init_platform_clocks(void); - #endif diff --git a/src/platform/baytrail/include/platform/interrupt.h b/src/platform/baytrail/include/platform/interrupt.h index d0cd17b6b807..5cf9e96c2690 100644 --- a/src/platform/baytrail/include/platform/interrupt.h +++ b/src/platform/baytrail/include/platform/interrupt.h @@ -88,17 +88,4 @@ /* no nested interrupts */ #define PLATFORM_IRQ_CHILDREN 0 -static inline void platform_interrupt_init(void) {} - -static inline struct irq_desc *platform_irq_get_parent(uint32_t irq) -{ - return NULL; -} - -void platform_interrupt_set(int irq); -void platform_interrupt_clear(uint32_t irq, uint32_t mask); -uint32_t platform_interrupt_get_enabled(void); -void platform_interrupt_mask(uint32_t irq, uint32_t mask); -void platform_interrupt_unmask(uint32_t irq, uint32_t mask); - #endif diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index 4cd7c508323e..c1230e7f60c7 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -112,4 +112,7 @@ static inline void platform_panic(uint32_t p) /* Platform defined trace code */ #define platform_trace_point(__x) \ shim_write(SHIM_IPCXL, (__x & 0x3fffffff)) + +extern struct timer *platform_timer; + #endif diff --git a/src/platform/baytrail/include/platform/timer.h b/src/platform/baytrail/include/platform/timer.h index 2801bb5b5c80..a11620ac43cd 100644 --- a/src/platform/baytrail/include/platform/timer.h +++ b/src/platform/baytrail/include/platform/timer.h @@ -44,26 +44,4 @@ #define TIMER2 IRQ_NUM_TIMER3 #define TIMER3 IRQ_NUM_EXT_TIMER -struct comp_dev; -struct sof_ipc_stream_posn; - -extern struct timer *platform_timer; - -int platform_timer_set(struct timer *timer, uint64_t ticks); -void platform_timer_clear(struct timer *timer); -uint64_t platform_timer_get(struct timer *timer); -void platform_timer_start(struct timer *timer); -void platform_timer_stop(struct timer *timer); - -/* get timestamp for host stream DMA position */ -void platform_host_timestamp(struct comp_dev *host, - struct sof_ipc_stream_posn *posn); - -/* get timestamp for DAI stream DMA position */ -void platform_dai_timestamp(struct comp_dev *dai, - struct sof_ipc_stream_posn *posn); - -/* get current wallclock for componnent */ -void platform_dai_wallclock(struct comp_dev *dai, uint64_t *wallclock); - #endif diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index 4ed35ad7b1be..cb8ba13e18a7 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -45,6 +45,7 @@ #include #include #include +#include #include #include #include @@ -164,133 +165,6 @@ int platform_boot_complete(uint32_t boot_message) return 0; } -/* clear mask in PISR, bits are W1C in docs but some bits need preserved ?? */ -void platform_interrupt_clear(uint32_t irq, uint32_t mask) -{ - switch (irq) { - case IRQ_NUM_EXT_SSP0: - shim_write(SHIM_PISR, mask << 3); - interrupt_clear(irq); - break; - case IRQ_NUM_EXT_SSP1: - shim_write(SHIM_PISR, mask << 4); - interrupt_clear(irq); - break; - case IRQ_NUM_EXT_SSP2: - shim_write(SHIM_PISR, mask << 5); - interrupt_clear(irq); - break; - case IRQ_NUM_EXT_DMAC0: - shim_write(SHIM_PISR, mask << 16); - interrupt_clear(irq); - break; - case IRQ_NUM_EXT_DMAC1: - shim_write(SHIM_PISR, mask << 24); - interrupt_clear(irq); - break; -#if defined CONFIG_CHERRYTRAIL - case IRQ_NUM_EXT_DMAC2: - shim_write(SHIM_PISRH, mask << 0); - interrupt_clear(irq); - break; - case IRQ_NUM_EXT_SSP3: - shim_write(SHIM_PISRH, mask << 8); - interrupt_clear(irq); - break; - case IRQ_NUM_EXT_SSP4: - shim_write(SHIM_PISRH, mask << 9); - interrupt_clear(irq); - break; - case IRQ_NUM_EXT_SSP5: - shim_write(SHIM_PISRH, mask << 10); - interrupt_clear(irq); - break; -#endif - default: - break; - } -} - -/* TODO: expand this to 64 bit - should we just return mask of IRQ numbers */ -uint32_t platform_interrupt_get_enabled(void) -{ - return shim_read(SHIM_PIMR); -} - -void platform_interrupt_mask(uint32_t irq, uint32_t mask) -{ - switch (irq) { - case IRQ_NUM_EXT_SSP0: - shim_write(SHIM_PIMR, mask << 3); - break; - case IRQ_NUM_EXT_SSP1: - shim_write(SHIM_PIMR, mask << 4); - break; - case IRQ_NUM_EXT_SSP2: - shim_write(SHIM_PIMR, mask << 5); - break; - case IRQ_NUM_EXT_DMAC0: - shim_write(SHIM_PIMR, mask << 16); - break; - case IRQ_NUM_EXT_DMAC1: - shim_write(SHIM_PIMR, mask << 24); - break; -#if defined CONFIG_CHERRYTRAIL - case IRQ_NUM_EXT_DMAC2: - shim_write(SHIM_PIMRH, mask << 8); - break; - case IRQ_NUM_EXT_SSP3: - shim_write(SHIM_PIMRH, mask << 0); - break; - case IRQ_NUM_EXT_SSP4: - shim_write(SHIM_PIMRH, mask << 1); - break; - case IRQ_NUM_EXT_SSP5: - shim_write(SHIM_PIMRH, mask << 2); - break; -#endif - default: - break; - } -} - -void platform_interrupt_unmask(uint32_t irq, uint32_t mask) -{ - switch (irq) { - case IRQ_NUM_EXT_SSP0: - shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 3)); - break; - case IRQ_NUM_EXT_SSP1: - shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 4)); - break; - case IRQ_NUM_EXT_SSP2: - shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 5)); - break; - case IRQ_NUM_EXT_DMAC0: - shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 16)); - break; - case IRQ_NUM_EXT_DMAC1: - shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) & ~(mask << 24)); - break; -#if defined CONFIG_CHERRYTRAIL - case IRQ_NUM_EXT_DMAC2: - shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 8)); - break; - case IRQ_NUM_EXT_SSP3: - shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 0)); - break; - case IRQ_NUM_EXT_SSP4: - shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 1)); - break; - case IRQ_NUM_EXT_SSP5: - shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) & ~(mask << 2)); - break; -#endif - default: - break; - } -} - int platform_init(struct sof *sof) { #if defined CONFIG_BAYTRAIL diff --git a/src/platform/cannonlake/include/platform/clk.h b/src/platform/cannonlake/include/platform/clk.h index d6ccd6c5698b..8b5ee82f883e 100644 --- a/src/platform/cannonlake/include/platform/clk.h +++ b/src/platform/cannonlake/include/platform/clk.h @@ -39,6 +39,4 @@ #define CLK_DEFAULT_CPU_HZ 120000000 #define CLK_MAX_CPU_HZ 400000000 -void init_platform_clocks(void); - #endif diff --git a/src/platform/cannonlake/include/platform/interrupt.h b/src/platform/cannonlake/include/platform/interrupt.h index b14cfdfd5237..63ffd0cae789 100644 --- a/src/platform/cannonlake/include/platform/interrupt.h +++ b/src/platform/cannonlake/include/platform/interrupt.h @@ -159,13 +159,4 @@ #define IRQ_MASK_EXT_LEVEL7 (1 << IRQ_NUM_EXT_LEVEL7) #define IRQ_MASK_SOFTWARE9 (1 << IRQ_NUM_SOFTWARE9) -void platform_interrupt_init(void); - -struct irq_desc *platform_irq_get_parent(uint32_t irq); -void platform_interrupt_set(int irq); -void platform_interrupt_clear(uint32_t irq, uint32_t mask); -uint32_t platform_interrupt_get_enabled(void); -void platform_interrupt_mask(uint32_t irq, uint32_t mask); -void platform_interrupt_unmask(uint32_t irq, uint32_t mask); - #endif diff --git a/src/platform/cannonlake/include/platform/timer.h b/src/platform/cannonlake/include/platform/timer.h index 02b7c6e0d8b5..7586c4f52ab1 100644 --- a/src/platform/cannonlake/include/platform/timer.h +++ b/src/platform/cannonlake/include/platform/timer.h @@ -46,25 +46,4 @@ #define TIMER3 IRQ_EXT_TSTAMP0_LVL2(0) #define TIMER4 IRQ_EXT_TSTAMP1_LVL2(0) -struct comp_dev; -struct sof_ipc_stream_posn; - -int platform_timer_set(struct timer *timer, uint64_t ticks); -void platform_timer_clear(struct timer *timer); -uint64_t platform_timer_get(struct timer *timer); -void platform_timer_start(struct timer *timer); -void platform_timer_stop(struct timer *timer); -int platform_timer_register(struct timer *timer, - void (*handler)(void *arg), void *arg); - -/* get timestamp for host stream DMA position */ -void platform_host_timestamp(struct comp_dev *host, - struct sof_ipc_stream_posn *posn); - -/* get timestamp for DAI stream DMA position */ -void platform_dai_timestamp(struct comp_dev *dai, - struct sof_ipc_stream_posn *posn); - -/* get current wallclock for componnent */ -void platform_dai_wallclock(struct comp_dev *dai, uint64_t *wallclock); #endif diff --git a/src/platform/haswell/Makefile.am b/src/platform/haswell/Makefile.am index 4f09c3af8cd0..fed578c44af4 100644 --- a/src/platform/haswell/Makefile.am +++ b/src/platform/haswell/Makefile.am @@ -8,8 +8,6 @@ libplatform_la_SOURCES = \ platform.c \ dai.c \ dma.c \ - clk.c \ - timer.c \ memory.c libplatform_la_CFLAGS = \ diff --git a/src/platform/haswell/include/platform/clk.h b/src/platform/haswell/include/platform/clk.h index 010396df45a2..ceb692312126 100644 --- a/src/platform/haswell/include/platform/clk.h +++ b/src/platform/haswell/include/platform/clk.h @@ -37,6 +37,4 @@ #define CLK_DEFAULT_CPU_HZ 320000000 #define CLK_MAX_CPU_HZ 320000000 -void init_platform_clocks(void); - #endif diff --git a/src/platform/haswell/include/platform/interrupt.h b/src/platform/haswell/include/platform/interrupt.h index 14d0e30c9db6..f09778653a3f 100644 --- a/src/platform/haswell/include/platform/interrupt.h +++ b/src/platform/haswell/include/platform/interrupt.h @@ -66,18 +66,4 @@ #define IRQ_MASK_EXT_PARITY (1 << IRQ_NUM_EXT_PARITY) #define IRQ_MASK_TIMER3 (1 << IRQ_NUM_TIMER3) -static inline void platform_interrupt_init(void) {} - -/* haswell does not support child IRQs */ -static inline struct irq_desc *platform_irq_get_parent(uint32_t irq) -{ - return NULL; -} - -void platform_interrupt_set(int irq); -void platform_interrupt_clear(uint32_t irq, uint32_t mask); -uint32_t platform_interrupt_get_enabled(void); -void platform_interrupt_mask(uint32_t irq, uint32_t mask); -void platform_interrupt_unmask(uint32_t irq, uint32_t mask); - #endif diff --git a/src/platform/haswell/include/platform/platform.h b/src/platform/haswell/include/platform/platform.h index 4a7f9b336266..fd2a5230ac7d 100644 --- a/src/platform/haswell/include/platform/platform.h +++ b/src/platform/haswell/include/platform/platform.h @@ -111,4 +111,7 @@ static inline void platform_panic(uint32_t p) /* Platform defined trace code */ #define platform_trace_point(__x) \ shim_write(SHIM_IPCX, ((__x) & 0x3fffffff)) + +extern struct timer *platform_timer; + #endif diff --git a/src/platform/haswell/include/platform/timer.h b/src/platform/haswell/include/platform/timer.h index c51e0e6d5f56..a09f3125d4f2 100644 --- a/src/platform/haswell/include/platform/timer.h +++ b/src/platform/haswell/include/platform/timer.h @@ -43,26 +43,4 @@ #define TIMER1 IRQ_NUM_TIMER2 #define TIMER2 IRQ_NUM_TIMER3 -struct comp_dev; -struct sof_ipc_stream_posn; - -extern struct timer *platform_timer; - -int platform_timer_set(struct timer *timer, uint64_t ticks); -void platform_timer_clear(struct timer *timer); -uint64_t platform_timer_get(struct timer *timer); -void platform_timer_start(struct timer *timer); -void platform_timer_stop(struct timer *timer); - -/* get timestamp for host stream DMA position */ -void platform_host_timestamp(struct comp_dev *host, - struct sof_ipc_stream_posn *posn); - -/* get timestamp for DAI stream DMA position */ -void platform_dai_timestamp(struct comp_dev *dai, - struct sof_ipc_stream_posn *posn); - -/* get current wallclock for componnent */ -void platform_dai_wallclock(struct comp_dev *dai, uint64_t *wallclock); - #endif diff --git a/src/platform/haswell/platform.c b/src/platform/haswell/platform.c index c3ac6e476eb8..19a1be61dd1e 100644 --- a/src/platform/haswell/platform.c +++ b/src/platform/haswell/platform.c @@ -43,6 +43,7 @@ #include #include #include +#include #include #include #include @@ -159,72 +160,6 @@ int platform_boot_complete(uint32_t boot_message) return 0; } -void platform_interrupt_set(int irq) -{ - arch_interrupt_set(irq); -} - -/* clear mask in PISR, bits are W1C in docs but some bits need preserved ?? */ -void platform_interrupt_clear(uint32_t irq, uint32_t mask) -{ - switch (irq) { - case IRQ_NUM_EXT_DMAC0: - case IRQ_NUM_EXT_DMAC1: - case IRQ_NUM_EXT_SSP0: - case IRQ_NUM_EXT_SSP1: - interrupt_clear(irq); - break; - default: - break; - } -} - -/* TODO: expand this to 64 bit - should we just return mask of IRQ numbers */ -uint32_t platform_interrupt_get_enabled(void) -{ - return shim_read(SHIM_IMRD); -} - -void platform_interrupt_mask(uint32_t irq, uint32_t mask) -{ - switch (irq) { - case IRQ_NUM_EXT_SSP0: - shim_write(SHIM_IMRD, SHIM_IMRD_SSP0); - break; - case IRQ_NUM_EXT_SSP1: - shim_write(SHIM_IMRD, SHIM_IMRD_SSP1); - break; - case IRQ_NUM_EXT_DMAC0: - shim_write(SHIM_IMRD, SHIM_IMRD_DMAC0); - break; - case IRQ_NUM_EXT_DMAC1: - shim_write(SHIM_IMRD, SHIM_IMRD_DMAC1); - break; - default: - break; - } -} - -void platform_interrupt_unmask(uint32_t irq, uint32_t mask) -{ - switch (irq) { - case IRQ_NUM_EXT_SSP0: - shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_SSP0); - break; - case IRQ_NUM_EXT_SSP1: - shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_SSP1); - break; - case IRQ_NUM_EXT_DMAC0: - shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DMAC0); - break; - case IRQ_NUM_EXT_DMAC1: - shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DMAC1); - break; - default: - break; - } -} - /* init shim registers */ static void platform_init_shim(void) { diff --git a/src/platform/intel/cavs/Makefile.am b/src/platform/intel/cavs/Makefile.am index 503d604237a5..f2eaa62716f0 100644 --- a/src/platform/intel/cavs/Makefile.am +++ b/src/platform/intel/cavs/Makefile.am @@ -4,9 +4,6 @@ libcavsplatform_la_SOURCES = \ platform.c \ dai.c \ dma.c \ - clk.c \ - timer.c \ - interrupt.c \ memory.c \ pm_runtime.c diff --git a/src/platform/intel/cavs/platform.c b/src/platform/intel/cavs/platform.c index eab1680cffba..0416080a9fda 100644 --- a/src/platform/intel/cavs/platform.c +++ b/src/platform/intel/cavs/platform.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #include #include