diff --git a/src/arch/host/include/arch/cpu.h b/src/arch/host/include/arch/cpu.h new file mode 100644 index 000000000000..6268b3f32953 --- /dev/null +++ b/src/arch/host/include/arch/cpu.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Rander Wang + * + */ + +#ifndef __INCLUDE_ARCH_CPU__ +#define __INCLUDE_ARCH_CPU__ + +static inline void arch_cpu_enable_core(int id) +{ +} + +static inline void arch_cpu_disable_core(int id) +{ +} + +static inline int arch_cpu_is_core_enabled(int id) +{ + return 0; +} + +static inline int arch_cpu_get_id(void) +{ + return 0; +} + +static inline void cpu_write_threadptr(int threadptr) +{ +} + +static inline int cpu_read_threadptr(void) +{ + return 0; +} + +#endif diff --git a/src/arch/host/include/arch/sof.h b/src/arch/host/include/arch/sof.h index ce2bd698b555..a8a2990c9333 100644 --- a/src/arch/host/include/arch/sof.h +++ b/src/arch/host/include/arch/sof.h @@ -42,6 +42,9 @@ /* architecture specific stack frames to dump */ #define ARCH_STACK_DUMP_FRAMES 32 +/* data cache line alignment */ +#define PLATFORM_DCACHE_ALIGN sizeof(uint32_t) + static inline void *arch_get_stack_ptr(void) { void *frames[ARCH_STACK_DUMP_FRAMES]; diff --git a/src/arch/host/include/arch/task.h b/src/arch/host/include/arch/task.h new file mode 100644 index 000000000000..f66512c9f686 --- /dev/null +++ b/src/arch/host/include/arch/task.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2017, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Liam Girdwood + * + */ + +/** + * \file arch/xtensa/include/arch/task.h + * \brief Arch task header file + * \authors Liam Girdwood + */ + +#ifndef __ARCH_TASK_H_ +#define __ARCH_TASK_H_ + +#include + +/** + * \brief Allocates IRQ tasks. + */ +static inline int arch_allocate_tasks(void) +{ + return 0; +} + +/** + * \brief Runs task. + * \param[in,out] task Task data. + */ +static inline void arch_run_task(struct task *task) +{ +} + +#endif diff --git a/src/audio/eq_fir.c b/src/audio/eq_fir.c index 79b6130f1b4a..e5d486fb4e33 100644 --- a/src/audio/eq_fir.c +++ b/src/audio/eq_fir.c @@ -124,7 +124,6 @@ static void eq_fir_free_delaylines(struct fir_state_32x16 fir[]) if (data) { trace_eq("fr1"); - trace_value((uint32_t)data); rfree(data); @@ -222,7 +221,6 @@ static int eq_fir_setup(struct fir_state_32x16 fir[], for (i = 0; i < nch; i++) { resp = assign_response[i]; if (resp >= 0) { - trace_value((uint32_t)fir_data); trace_value(fir->length); fir_init_delay(&fir[i], &fir_data); } diff --git a/src/host/common_test.c b/src/host/common_test.c index 1065336082da..ef5100b7006a 100644 --- a/src/host/common_test.c +++ b/src/host/common_test.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include #include diff --git a/src/host/ipc.c b/src/host/ipc.c index 0cbb61aa2fde..604980d7c329 100644 --- a/src/host/ipc.c +++ b/src/host/ipc.c @@ -40,20 +40,12 @@ struct ipc *_ipc; int platform_ipc_init(struct ipc *ipc) { struct intel_ipc_data *iipc; - int i; _ipc = ipc; /* init ipc data */ iipc = malloc(sizeof(struct intel_ipc_data)); ipc_set_drvdata(_ipc, iipc); - _ipc->dsp_msg = NULL; - list_init(&ipc->empty_list); - list_init(&ipc->msg_list); - spinlock_init(&ipc->lock); - - for (i = 0; i < MSG_QUEUE_SIZE; i++) - list_item_prepend(&ipc->message[i].list, &ipc->empty_list); /* allocate page table buffer */ iipc->page_table = malloc(HOST_PAGE_SIZE); diff --git a/src/host/testbench.c b/src/host/testbench.c index 3f272992c311..a870bc3090ca 100644 --- a/src/host/testbench.c +++ b/src/host/testbench.c @@ -129,7 +129,7 @@ static void free_comps(void) struct list_item *temp; struct ipc_comp_dev *icd = NULL; - list_for_item_safe(clist, temp, &sof.ipc->comp_list) { + list_for_item_safe(clist, temp, &sof.ipc->shared_ctx->comp_list) { icd = container_of(clist, struct ipc_comp_dev, list); switch (icd->type) { case COMP_TYPE_COMPONENT: diff --git a/src/library/include/platform/idc.h b/src/library/include/platform/idc.h new file mode 100644 index 000000000000..1664b326acdb --- /dev/null +++ b/src/library/include/platform/idc.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Tomasz Lauda + */ + +#ifndef __INCLUDE_PLATFORM_IDC_H__ +#define __INCLUDE_PLATFORM_IDC_H__ + +static inline int idc_send_msg(struct idc_msg *msg, uint32_t mode) +{ + return 0; +} + +static inline void idc_process_msg_queue(void) +{ +} + +static inline void idc_init(void) +{ +} + +#endif